From a04670629c109e6a17f60c6c1e1d80a9a49dab94 Mon Sep 17 00:00:00 2001 From: Shawn Lin Date: Thu, 24 Nov 2016 09:54:21 +0800 Subject: [PATCH] UPSTREAM: PCI: rockchip: move the deassert of pm/aclk/pclk after phy_init Move them after phy_init as we want to optimize the logic of reset control and reuse rockchip_pcie_init_port later which should fully follow the cold boot procedure of ROM code. Change-Id: I0a826a6de91a7c413e42e36ea5ceea5007ee7b73 Reviewed-by: Brian Norris Signed-off-by: Shawn Lin (cherry picked from 0722bdd2962a4a0f6d5e8973b0d274d147adacfb) --- drivers/pci/host/pcie-rockchip.c | 40 ++++++++++++++++---------------- 1 file changed, 20 insertions(+), 20 deletions(-) diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c index 1531d85642ac..3c8da1087fd2 100644 --- a/drivers/pci/host/pcie-rockchip.c +++ b/drivers/pci/host/pcie-rockchip.c @@ -473,26 +473,6 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip) return err; } - udelay(10); - - err = reset_control_deassert(rockchip->pm_rst); - if (err) { - dev_err(dev, "deassert pm_rst err %d\n", err); - return err; - } - - err = reset_control_deassert(rockchip->aclk_rst); - if (err) { - dev_err(dev, "deassert mgmt_sticky_rst err %d\n", err); - return err; - } - - err = reset_control_deassert(rockchip->pclk_rst); - if (err) { - dev_err(dev, "deassert mgmt_sticky_rst err %d\n", err); - return err; - } - err = phy_init(rockchip->phy); if (err < 0) { dev_err(dev, "fail to init phy, err %d\n", err); @@ -523,6 +503,26 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip) return err; } + udelay(10); + + err = reset_control_deassert(rockchip->pm_rst); + if (err) { + dev_err(dev, "deassert pm_rst err %d\n", err); + return err; + } + + err = reset_control_deassert(rockchip->aclk_rst); + if (err) { + dev_err(dev, "deassert aclk_rst err %d\n", err); + return err; + } + + err = reset_control_deassert(rockchip->pclk_rst); + if (err) { + dev_err(dev, "deassert pclk_rst err %d\n", err); + return err; + } + if (rockchip->link_gen == 2) rockchip_pcie_write(rockchip, PCIE_CLIENT_GEN_SEL_2, PCIE_CLIENT_CONFIG); -- 2.34.1