From a0f9674b021873d53a3f686503da601372783ecb Mon Sep 17 00:00:00 2001 From: yxj Date: Fri, 1 Mar 2013 10:31:06 +0800 Subject: [PATCH] lcd_hdmi_xxx.c:compatile with new rk hdmi framework --- .../video/display/screen/lcd_hdmi_1024x768.c | 593 ++++++++--------- .../video/display/screen/lcd_hdmi_1280x800.c | 600 +++++++++--------- .../video/display/screen/lcd_hdmi_800x480.c | 259 ++++---- 3 files changed, 742 insertions(+), 710 deletions(-) diff --git a/drivers/video/display/screen/lcd_hdmi_1024x768.c b/drivers/video/display/screen/lcd_hdmi_1024x768.c index 554215328be1..9d6f3c933002 100644 --- a/drivers/video/display/screen/lcd_hdmi_1024x768.c +++ b/drivers/video/display/screen/lcd_hdmi_1024x768.c @@ -1,291 +1,302 @@ -#include -#include -#include -#include -#include -#include "screen.h" -#include -#include "../../rk29_fb.h" - - -/* Base */ -#define OUT_TYPE SCREEN_LVDS - -#define OUT_FORMAT LVDS_8BIT_2 -#define OUT_FACE OUT_D888_P666 -#define OUT_CLK 65000000 -#define LCDC_ACLK 500000000//312000000 //29 lcdc axi DMA ƵÂÊ - -/* Timing */ -#define H_PW 10 -#define H_BP 100 -#define H_VD 1024 -#define H_FP 210 - -#define V_PW 10 -#define V_BP 10 -#define V_VD 768 -#define V_FP 18 - -#define LCD_WIDTH 202 -#define LCD_HEIGHT 152 - -/* scaler Timing */ -//1920*1080*60 -#define S_OUT_CLK SCALE_RATE(148500000,66000000) //m=16 n=9 no=4 -#define S_H_PW 100 -#define S_H_BP 100 -#define S_H_VD 1024 -#define S_H_FP 151 - -#define S_V_PW 5 -#define S_V_BP 15 -#define S_V_VD 768 -#define S_V_FP 12 - -#define S_H_ST 1757 -#define S_V_ST 14 - -//1920*1080*50 -#define S1_OUT_CLK SCALE_RATE(148500000,54000000) //m=16 n=11 no=4 -#define S1_H_PW 100 -#define S1_H_BP 100 -#define S1_H_VD 1024 -#define S1_H_FP 126 - -#define S1_V_PW 5 -#define S1_V_BP 15 -#define S1_V_VD 768 -#define S1_V_FP 12 - -#define S1_H_ST 1757 -#define S1_V_ST 14 - -//1280*720*60 -#define S2_OUT_CLK SCALE_RATE(74250000,66000000) //m=32 n=9 no=4 -#define S2_H_PW 100 -#define S2_H_BP 100 -#define S2_H_VD 1024 -#define S2_H_FP 151 - -#define S2_V_PW 5 -#define S2_V_BP 15 -#define S2_V_VD 768 -#define S2_V_FP 12 - -#define S2_H_ST 0 -#define S2_V_ST 12 -//1280*720*50 - -#define S3_OUT_CLK SCALE_RATE(74250000,54000000) // m=32 n=11 no=4 -#define S3_H_PW 100 -#define S3_H_BP 100 -#define S3_H_VD 1024 -#define S3_H_FP 151 - -#define S3_V_PW 5 -#define S3_V_BP 15 -#define S3_V_VD 768 -#define S3_V_FP 12 - -#define S3_H_ST 0 -#define S3_V_ST 12 - -//720*576*50 -#define S4_OUT_CLK SCALE_RATE(27000000,54375000) //m=145 n=9 no=8 -#define S4_H_PW 100 -#define S4_H_BP 100 -#define S4_H_VD 1024 -#define S4_H_FP 81 - -#define S4_V_PW 5 -#define S4_V_BP 15 -#define S4_V_VD 768 -#define S4_V_FP 45 - - -#define S4_H_ST 435 -#define S4_V_ST 45 -//720*480*60 -#define S5_OUT_CLK SCALE_RATE(27000000,72000000) //m=32 n=3 no=4 -#define S5_H_PW 100 -#define S5_H_BP 100 -#define S5_H_VD 1024 -#define S5_H_FP 81 - -#define S5_V_PW 5 -#define S5_V_BP 15 -#define S5_V_VD 768 -#define S5_V_FP 51 - -#define S5_H_ST 858 -#define S5_V_ST 45 - -#define S_DCLK_POL 0 - -/* Other */ -#define DCLK_POL 0 -#define SWAP_RB 0 - -#if ( defined(CONFIG_ONE_LCDC_DUAL_OUTPUT_INF)&& defined(CONFIG_RK610_LVDS) ) || defined(CONFIG_HDMI_DUAL_DISP) -static int set_scaler_info(struct rk29fb_screen *screen, u8 hdmi_resolution) -{ - screen->s_clk_inv = S_DCLK_POL; - screen->s_den_inv = 0; - screen->s_hv_sync_inv = 0; - switch(hdmi_resolution){ - case HDMI_1920x1080p_60Hz: - /* Scaler Timing */ - screen->hdmi_resolution = hdmi_resolution; - screen->s_pixclock = S_OUT_CLK; - screen->s_hsync_len = S_H_PW; - screen->s_left_margin = S_H_BP; - screen->s_right_margin = S_H_FP; - screen->s_hsync_len = S_H_PW; - screen->s_upper_margin = S_V_BP; - screen->s_lower_margin = S_V_FP; - screen->s_vsync_len = S_V_PW; - screen->s_hsync_st = S_H_ST; - screen->s_vsync_st = S_V_ST; - break; - case HDMI_1920x1080p_50Hz: - /* Scaler Timing */ - screen->hdmi_resolution = hdmi_resolution; - screen->s_pixclock = S1_OUT_CLK; - screen->s_hsync_len = S1_H_PW; - screen->s_left_margin = S1_H_BP; - screen->s_right_margin = S1_H_FP; - screen->s_hsync_len = S1_H_PW; - screen->s_upper_margin = S1_V_BP; - screen->s_lower_margin = S1_V_FP; - screen->s_vsync_len = S1_V_PW; - screen->s_hsync_st = S1_H_ST; - screen->s_vsync_st = S1_V_ST; - break; - case HDMI_1280x720p_60Hz: - /* Scaler Timing */ - screen->hdmi_resolution = hdmi_resolution; - screen->s_pixclock = S2_OUT_CLK; - screen->s_hsync_len = S2_H_PW; - screen->s_left_margin = S2_H_BP; - screen->s_right_margin = S2_H_FP; - screen->s_hsync_len = S2_H_PW; - screen->s_upper_margin = S2_V_BP; - screen->s_lower_margin = S2_V_FP; - screen->s_vsync_len = S2_V_PW; - screen->s_hsync_st = S2_H_ST; - screen->s_vsync_st = S2_V_ST; - break; - case HDMI_1280x720p_50Hz: - /* Scaler Timing */ - screen->hdmi_resolution = hdmi_resolution; - screen->s_pixclock = S3_OUT_CLK; - screen->s_hsync_len = S3_H_PW; - screen->s_left_margin = S3_H_BP; - screen->s_right_margin = S3_H_FP; - screen->s_hsync_len = S3_H_PW; - screen->s_upper_margin = S3_V_BP; - screen->s_lower_margin = S3_V_FP; - screen->s_vsync_len = S3_V_PW; - screen->s_hsync_st = S3_H_ST; - screen->s_vsync_st = S3_V_ST; - break; - case HDMI_720x576p_50Hz_4x3: - case HDMI_720x576p_50Hz_16x9: - /* Scaler Timing */ - screen->hdmi_resolution = hdmi_resolution; - screen->s_pixclock = S4_OUT_CLK; - screen->s_hsync_len = S4_H_PW; - screen->s_left_margin = S4_H_BP; - screen->s_right_margin = S4_H_FP; - screen->s_hsync_len = S4_H_PW; - screen->s_upper_margin = S4_V_BP; - screen->s_lower_margin = S4_V_FP; - screen->s_vsync_len = S4_V_PW; - screen->s_hsync_st = S4_H_ST; - screen->s_vsync_st = S4_V_ST; - break; - case HDMI_720x480p_60Hz_16x9: - case HDMI_720x480p_60Hz_4x3: - /* Scaler Timing */ - screen->hdmi_resolution = hdmi_resolution; - screen->s_pixclock = S5_OUT_CLK; - screen->s_hsync_len = S5_H_PW; - screen->s_left_margin = S5_H_BP; - screen->s_right_margin = S5_H_FP; - screen->s_hsync_len = S5_H_PW; - screen->s_upper_margin = S5_V_BP; - screen->s_lower_margin = S5_V_FP; - screen->s_vsync_len = S5_V_PW; - screen->s_hsync_st = S5_H_ST; - screen->s_vsync_st = S5_V_ST; - break; - default : - printk("%s lcd not support dual display at this hdmi resolution %d \n",__func__,hdmi_resolution); - return -1; - break; - } - - return 0; -} -#else -static int set_scaler_info(struct rk29fb_screen *screen, u8 hdmi_resolution){} -#endif - -void set_lcd_info(struct rk29fb_screen *screen, struct rk29lcd_info *lcd_info ) -{ - /* screen type & face */ - screen->type = OUT_TYPE; - screen->face = OUT_FACE; - screen->hw_format = OUT_FORMAT; - - /* Screen size */ - screen->x_res = H_VD; - screen->y_res = V_VD; - - screen->width = LCD_WIDTH; - screen->height = LCD_HEIGHT; - - /* Timing */ - screen->lcdc_aclk = LCDC_ACLK; - screen->pixclock = OUT_CLK; - screen->left_margin = H_BP; - screen->right_margin = H_FP; - screen->hsync_len = H_PW; - screen->upper_margin = V_BP; - screen->lower_margin = V_FP; - screen->vsync_len = V_PW; - - /* Pin polarity */ - screen->pin_hsync = 0; - screen->pin_vsync = 0; - screen->pin_den = 0; - screen->pin_dclk = DCLK_POL; - - /* Swap rule */ - screen->swap_rb = SWAP_RB; - screen->swap_rg = 0; - screen->swap_gb = 0; - screen->swap_delta = 0; - screen->swap_dumy = 0; - - /* Operation function*/ - screen->init = NULL; - screen->standby = NULL; - screen->sscreen_get = set_scaler_info; -#ifdef CONFIG_RK610_LVDS - screen->sscreen_set = rk610_lcd_scaler_set_param; -#endif -} - -size_t get_fb_size(void) -{ - size_t size = 0; - #if defined(CONFIG_THREE_FB_BUFFER) - size = ((H_VD)*(V_VD)<<2)* 3; //three buffer - #else - size = ((H_VD)*(V_VD)<<2)<<1; //two buffer - #endif - return ALIGN(size,SZ_1M); -} - +#include +#include +#include +#include +#include +#if defined(CONFIG_RK_HDMI) +#include "../../rockchip/hdmi/rk_hdmi.h" +#endif +#ifdef CONFIG_RK610_LVDS +#include "../transmitter/rk610_lcd.h" +#endif + + +/* Base */ +#define OUT_TYPE SCREEN_LVDS + +#define OUT_FORMAT LVDS_8BIT_2 +#define OUT_FACE OUT_D888_P666 +#define OUT_CLK 65000000 +#define LCDC_ACLK 500000000//312000000 //29 lcdc axi DMA ƵÂÊ + +/* Timing */ +#define H_PW 10 +#define H_BP 100 +#define H_VD 1024 +#define H_FP 210 + +#define V_PW 10 +#define V_BP 10 +#define V_VD 768 +#define V_FP 18 + +#define LCD_WIDTH 202 +#define LCD_HEIGHT 152 + +/* scaler Timing */ +//1920*1080*60 +#define S_OUT_CLK SCALE_RATE(148500000,66000000) //m=16 n=9 no=4 +#define S_H_PW 100 +#define S_H_BP 100 +#define S_H_VD 1024 +#define S_H_FP 151 + +#define S_V_PW 5 +#define S_V_BP 15 +#define S_V_VD 768 +#define S_V_FP 12 + +#define S_H_ST 1757 +#define S_V_ST 14 + +//1920*1080*50 +#define S1_OUT_CLK SCALE_RATE(148500000,54000000) //m=16 n=11 no=4 +#define S1_H_PW 100 +#define S1_H_BP 100 +#define S1_H_VD 1024 +#define S1_H_FP 126 + +#define S1_V_PW 5 +#define S1_V_BP 15 +#define S1_V_VD 768 +#define S1_V_FP 12 + +#define S1_H_ST 1757 +#define S1_V_ST 14 + +//1280*720*60 +#define S2_OUT_CLK SCALE_RATE(74250000,66000000) //m=32 n=9 no=4 +#define S2_H_PW 100 +#define S2_H_BP 100 +#define S2_H_VD 1024 +#define S2_H_FP 151 + +#define S2_V_PW 5 +#define S2_V_BP 15 +#define S2_V_VD 768 +#define S2_V_FP 12 + +#define S2_H_ST 0 +#define S2_V_ST 12 +//1280*720*50 + +#define S3_OUT_CLK SCALE_RATE(74250000,54000000) // m=32 n=11 no=4 +#define S3_H_PW 100 +#define S3_H_BP 100 +#define S3_H_VD 1024 +#define S3_H_FP 151 + +#define S3_V_PW 5 +#define S3_V_BP 15 +#define S3_V_VD 768 +#define S3_V_FP 12 + +#define S3_H_ST 0 +#define S3_V_ST 12 + +//720*576*50 +#define S4_OUT_CLK SCALE_RATE(27000000,54375000) //m=145 n=9 no=8 +#define S4_H_PW 100 +#define S4_H_BP 100 +#define S4_H_VD 1024 +#define S4_H_FP 81 + +#define S4_V_PW 5 +#define S4_V_BP 15 +#define S4_V_VD 768 +#define S4_V_FP 45 + + +#define S4_H_ST 435 +#define S4_V_ST 45 +//720*480*60 +#define S5_OUT_CLK SCALE_RATE(27000000,72000000) //m=32 n=3 no=4 +#define S5_H_PW 100 +#define S5_H_BP 100 +#define S5_H_VD 1024 +#define S5_H_FP 81 + +#define S5_V_PW 5 +#define S5_V_BP 15 +#define S5_V_VD 768 +#define S5_V_FP 51 + +#define S5_H_ST 858 +#define S5_V_ST 45 + +#define S_DCLK_POL 0 + +/* Other */ +#define DCLK_POL 0 + +#define DEN_POL 0 +#define VSYNC_POL 0 +#define HSYNC_POL 0 + +#define SWAP_RB 0 +#define SWAP_RG 0 +#define SWAP_GB 0 + + +#if ( defined(CONFIG_ONE_LCDC_DUAL_OUTPUT_INF)&& defined(CONFIG_RK610_LVDS) ) || defined(CONFIG_HDMI_DUAL_DISP) +static int set_scaler_info(struct rk29fb_screen *screen, u8 hdmi_resolution) +{ + screen->s_clk_inv = S_DCLK_POL; + screen->s_den_inv = 0; + screen->s_hv_sync_inv = 0; + switch(hdmi_resolution){ + case HDMI_1920x1080p_60Hz: + /* Scaler Timing */ + screen->hdmi_resolution = hdmi_resolution; + screen->s_pixclock = S_OUT_CLK; + screen->s_hsync_len = S_H_PW; + screen->s_left_margin = S_H_BP; + screen->s_right_margin = S_H_FP; + screen->s_hsync_len = S_H_PW; + screen->s_upper_margin = S_V_BP; + screen->s_lower_margin = S_V_FP; + screen->s_vsync_len = S_V_PW; + screen->s_hsync_st = S_H_ST; + screen->s_vsync_st = S_V_ST; + break; + case HDMI_1920x1080p_50Hz: + /* Scaler Timing */ + screen->hdmi_resolution = hdmi_resolution; + screen->s_pixclock = S1_OUT_CLK; + screen->s_hsync_len = S1_H_PW; + screen->s_left_margin = S1_H_BP; + screen->s_right_margin = S1_H_FP; + screen->s_hsync_len = S1_H_PW; + screen->s_upper_margin = S1_V_BP; + screen->s_lower_margin = S1_V_FP; + screen->s_vsync_len = S1_V_PW; + screen->s_hsync_st = S1_H_ST; + screen->s_vsync_st = S1_V_ST; + break; + case HDMI_1280x720p_60Hz: + /* Scaler Timing */ + screen->hdmi_resolution = hdmi_resolution; + screen->s_pixclock = S2_OUT_CLK; + screen->s_hsync_len = S2_H_PW; + screen->s_left_margin = S2_H_BP; + screen->s_right_margin = S2_H_FP; + screen->s_hsync_len = S2_H_PW; + screen->s_upper_margin = S2_V_BP; + screen->s_lower_margin = S2_V_FP; + screen->s_vsync_len = S2_V_PW; + screen->s_hsync_st = S2_H_ST; + screen->s_vsync_st = S2_V_ST; + break; + case HDMI_1280x720p_50Hz: + /* Scaler Timing */ + screen->hdmi_resolution = hdmi_resolution; + screen->s_pixclock = S3_OUT_CLK; + screen->s_hsync_len = S3_H_PW; + screen->s_left_margin = S3_H_BP; + screen->s_right_margin = S3_H_FP; + screen->s_hsync_len = S3_H_PW; + screen->s_upper_margin = S3_V_BP; + screen->s_lower_margin = S3_V_FP; + screen->s_vsync_len = S3_V_PW; + screen->s_hsync_st = S3_H_ST; + screen->s_vsync_st = S3_V_ST; + break; + case HDMI_720x576p_50Hz_4_3: + case HDMI_720x576p_50Hz_16_9: + /* Scaler Timing */ + screen->hdmi_resolution = hdmi_resolution; + screen->s_pixclock = S4_OUT_CLK; + screen->s_hsync_len = S4_H_PW; + screen->s_left_margin = S4_H_BP; + screen->s_right_margin = S4_H_FP; + screen->s_hsync_len = S4_H_PW; + screen->s_upper_margin = S4_V_BP; + screen->s_lower_margin = S4_V_FP; + screen->s_vsync_len = S4_V_PW; + screen->s_hsync_st = S4_H_ST; + screen->s_vsync_st = S4_V_ST; + break; + case HDMI_720x480p_60Hz_16_9: + case HDMI_720x480p_60Hz_4_3: + /* Scaler Timing */ + screen->hdmi_resolution = hdmi_resolution; + screen->s_pixclock = S5_OUT_CLK; + screen->s_hsync_len = S5_H_PW; + screen->s_left_margin = S5_H_BP; + screen->s_right_margin = S5_H_FP; + screen->s_hsync_len = S5_H_PW; + screen->s_upper_margin = S5_V_BP; + screen->s_lower_margin = S5_V_FP; + screen->s_vsync_len = S5_V_PW; + screen->s_hsync_st = S5_H_ST; + screen->s_vsync_st = S5_V_ST; + break; + default : + printk("%s lcd not support dual display at this hdmi resolution %d \n",__func__,hdmi_resolution); + return -1; + break; + } + + return 0; +} +#else +static int set_scaler_info(struct rk29fb_screen *screen, u8 hdmi_resolution){return 0;} +#endif + +void set_lcd_info(struct rk29fb_screen *screen, struct rk29lcd_info *lcd_info ) +{ + /* screen type & face */ + screen->type = OUT_TYPE; + screen->face = OUT_FACE; + screen->hw_format = OUT_FORMAT; + + /* Screen size */ + screen->x_res = H_VD; + screen->y_res = V_VD; + + screen->width = LCD_WIDTH; + screen->height = LCD_HEIGHT; + + /* Timing */ + screen->lcdc_aclk = LCDC_ACLK; + screen->pixclock = OUT_CLK; + screen->left_margin = H_BP; + screen->right_margin = H_FP; + screen->hsync_len = H_PW; + screen->upper_margin = V_BP; + screen->lower_margin = V_FP; + screen->vsync_len = V_PW; + + /* Pin polarity */ + screen->pin_hsync = HSYNC_POL; + screen->pin_vsync = VSYNC_POL; + screen->pin_den = DEN_POL; + screen->pin_dclk = DCLK_POL; + + /* Swap rule */ + screen->swap_rb = SWAP_RB; + screen->swap_rg = SWAP_RG; + screen->swap_gb = SWAP_GB; + screen->swap_delta = 0; + screen->swap_dumy = 0; + + /* Operation function*/ + screen->init = NULL; + screen->standby = NULL; + screen->sscreen_get = set_scaler_info; +#ifdef CONFIG_RK610_LVDS + screen->sscreen_set = rk610_lcd_scaler_set_param; +#endif +} + +size_t get_fb_size(void) +{ + size_t size = 0; + #if defined(CONFIG_THREE_FB_BUFFER) + size = ((H_VD)*(V_VD)<<2)* 3; //three buffer + #else + size = ((H_VD)*(V_VD)<<2)<<1; //two buffer + #endif + return ALIGN(size,SZ_1M); +} + diff --git a/drivers/video/display/screen/lcd_hdmi_1280x800.c b/drivers/video/display/screen/lcd_hdmi_1280x800.c index 17b3d44b7bce..78eae7b30fb7 100644 --- a/drivers/video/display/screen/lcd_hdmi_1280x800.c +++ b/drivers/video/display/screen/lcd_hdmi_1280x800.c @@ -1,294 +1,306 @@ -#include -#include -#include -#include -#include -#include "screen.h" -#include -#include "../../rk29_fb.h" -#include "../transmitter/rk610_lcd.h" - - -/* Base */ -#define OUT_TYPE SCREEN_LVDS - -#define OUT_FORMAT LVDS_8BIT_2 - -#define OUT_FACE OUT_D888_P666 -#define OUT_CLK 65000000 -#define LCDC_ACLK 500000000//312000000 //29 lcdc axi DMA ƵÂÊ - - -/* Timing */ -#define H_PW 10 -#define H_BP 10 -#define H_VD 1280 -#define H_FP 20 - -#define V_PW 10 -#define V_BP 10 -#define V_VD 800 -#define V_FP 13 - -#define LCD_WIDTH 202 -#define LCD_HEIGHT 152 - -/* scaler Timing */ -//1920*1080*60 - -#define S_OUT_CLK SCALE_RATE(148500000,66000000) //m=16 n=9 no=4 -#define S_H_PW 10 -#define S_H_BP 10 -#define S_H_VD 1280 -#define S_H_FP 20 - -#define S_V_PW 10 -#define S_V_BP 10 -#define S_V_VD 800 -#define S_V_FP 13 - -#define S_H_ST 440 -#define S_V_ST 13 - -//1920*1080*50 -#define S1_OUT_CLK SCALE_RATE(148500000,57375000) //m=17 n=11 no=4 -#define S1_H_PW 10 -#define S1_H_BP 10 -#define S1_H_VD 1280 -#define S1_H_FP 77 - -#define S1_V_PW 10 -#define S1_V_BP 10 -#define S1_V_VD 800 -#define S1_V_FP 13 - -#define S1_H_ST 459 -#define S1_V_ST 13 - -//1280*720*60 -#define S2_OUT_CLK SCALE_RATE(74250000,66000000) //m=32 n=9 no=4 -#define S2_H_PW 10 -#define S2_H_BP 10 -#define S2_H_VD 1280 -#define S2_H_FP 20 - -#define S2_V_PW 10 -#define S2_V_BP 10 -#define S2_V_VD 800 -#define S2_V_FP 13 - -#define S2_H_ST 440 -#define S2_V_ST 13 - -//1280*720*50 - -#define S3_OUT_CLK SCALE_RATE(74250000,57375000) // m=34 n=11 no=4 -#define S3_H_PW 10 -#define S3_H_BP 10 -#define S3_H_VD 1280 -#define S3_H_FP 77 - -#define S3_V_PW 10 -#define S3_V_BP 10 -#define S3_V_VD 800 -#define S3_V_FP 13 - -#define S3_H_ST 459 -#define S3_V_ST 13 - -//720*576*50 -#define S4_OUT_CLK SCALE_RATE(27000000,63281250) //m=75 n=4 no=8 -#define S4_H_PW 10 -#define S4_H_BP 10 -#define S4_H_VD 1280 -#define S4_H_FP 185 - -#define S4_V_PW 10 -#define S4_V_BP 10 -#define S4_V_VD 800 -#define S4_V_FP 48 - -#define S4_H_ST 81 -#define S4_V_ST 48 - -//720*480*60 -#define S5_OUT_CLK SCALE_RATE(27000000,75000000) //m=100 n=9 no=4 -#define S5_H_PW 10 -#define S5_H_BP 10 -#define S5_H_VD 1280 -#define S5_H_FP 130 - -#define S5_V_PW 10 -#define S5_V_BP 10 -#define S5_V_VD 800 -#define S5_V_FP 54 - -#define S5_H_ST 476 -#define S5_V_ST 48 - -#define S_DCLK_POL 0 - -/* Other */ -#define DCLK_POL 0 -#define SWAP_RB 0 - -#if ( defined(CONFIG_ONE_LCDC_DUAL_OUTPUT_INF)&& defined(CONFIG_RK610_LVDS) ) || defined(CONFIG_HDMI_DUAL_DISP) -static int set_scaler_info(struct rk29fb_screen *screen, u8 hdmi_resolution) -{ - screen->s_clk_inv = S_DCLK_POL; - screen->s_den_inv = 0; - screen->s_hv_sync_inv = 0; - switch(hdmi_resolution){ - case HDMI_1920x1080p_60Hz: - /* Scaler Timing */ - screen->hdmi_resolution = hdmi_resolution; - screen->s_pixclock = S_OUT_CLK; - screen->s_hsync_len = S_H_PW; - screen->s_left_margin = S_H_BP; - screen->s_right_margin = S_H_FP; - screen->s_hsync_len = S_H_PW; - screen->s_upper_margin = S_V_BP; - screen->s_lower_margin = S_V_FP; - screen->s_vsync_len = S_V_PW; - screen->s_hsync_st = S_H_ST; - screen->s_vsync_st = S_V_ST; - break; - case HDMI_1920x1080p_50Hz: - /* Scaler Timing */ - screen->hdmi_resolution = hdmi_resolution; - screen->s_pixclock = S1_OUT_CLK; - screen->s_hsync_len = S1_H_PW; - screen->s_left_margin = S1_H_BP; - screen->s_right_margin = S1_H_FP; - screen->s_hsync_len = S1_H_PW; - screen->s_upper_margin = S1_V_BP; - screen->s_lower_margin = S1_V_FP; - screen->s_vsync_len = S1_V_PW; - screen->s_hsync_st = S1_H_ST; - screen->s_vsync_st = S1_V_ST; - break; - case HDMI_1280x720p_60Hz: - /* Scaler Timing */ - screen->hdmi_resolution = hdmi_resolution; - screen->s_pixclock = S2_OUT_CLK; - screen->s_hsync_len = S2_H_PW; - screen->s_left_margin = S2_H_BP; - screen->s_right_margin = S2_H_FP; - screen->s_hsync_len = S2_H_PW; - screen->s_upper_margin = S2_V_BP; - screen->s_lower_margin = S2_V_FP; - screen->s_vsync_len = S2_V_PW; - screen->s_hsync_st = S2_H_ST; - screen->s_vsync_st = S2_V_ST; - break; - case HDMI_1280x720p_50Hz: - /* Scaler Timing */ - screen->hdmi_resolution = hdmi_resolution; - screen->s_pixclock = S3_OUT_CLK; - screen->s_hsync_len = S3_H_PW; - screen->s_left_margin = S3_H_BP; - screen->s_right_margin = S3_H_FP; - screen->s_hsync_len = S3_H_PW; - screen->s_upper_margin = S3_V_BP; - screen->s_lower_margin = S3_V_FP; - screen->s_vsync_len = S3_V_PW; - screen->s_hsync_st = S3_H_ST; - screen->s_vsync_st = S3_V_ST; - break; - case HDMI_720x576p_50Hz_4x3: - case HDMI_720x576p_50Hz_16x9: - /* Scaler Timing */ - screen->hdmi_resolution = hdmi_resolution; - screen->s_pixclock = S4_OUT_CLK; - screen->s_hsync_len = S4_H_PW; - screen->s_left_margin = S4_H_BP; - screen->s_right_margin = S4_H_FP; - screen->s_hsync_len = S4_H_PW; - screen->s_upper_margin = S4_V_BP; - screen->s_lower_margin = S4_V_FP; - screen->s_vsync_len = S4_V_PW; - screen->s_hsync_st = S4_H_ST; - screen->s_vsync_st = S4_V_ST; - break; - case HDMI_720x480p_60Hz_16x9: - case HDMI_720x480p_60Hz_4x3: - /* Scaler Timing */ - screen->hdmi_resolution = hdmi_resolution; - screen->s_pixclock = S5_OUT_CLK; - screen->s_hsync_len = S5_H_PW; - screen->s_left_margin = S5_H_BP; - screen->s_right_margin = S5_H_FP; - screen->s_hsync_len = S5_H_PW; - screen->s_upper_margin = S5_V_BP; - screen->s_lower_margin = S5_V_FP; - screen->s_vsync_len = S5_V_PW; - screen->s_hsync_st = S5_H_ST; - screen->s_vsync_st = S5_V_ST; - break; - default : - printk("%s lcd not support dual display at this hdmi resolution %d \n",__func__,hdmi_resolution); - return -1; - break; - } - - return 0; -} -#else -static int set_scaler_info(struct rk29fb_screen *screen, u8 hdmi_resolution){} -#endif -void set_lcd_info(struct rk29fb_screen *screen, struct rk29lcd_info *lcd_info ) -{ - /* screen type & face */ - screen->type = OUT_TYPE; - screen->face = OUT_FACE; - screen->hw_format = OUT_FORMAT; - - /* Screen size */ - screen->x_res = H_VD; - screen->y_res = V_VD; - - screen->width = LCD_WIDTH; - screen->height = LCD_HEIGHT; - - /* Timing */ - screen->lcdc_aclk = LCDC_ACLK; - screen->pixclock = OUT_CLK; - screen->left_margin = H_BP; - screen->right_margin = H_FP; - screen->hsync_len = H_PW; - screen->upper_margin = V_BP; - screen->lower_margin = V_FP; - screen->vsync_len = V_PW; - - /* Pin polarity */ - screen->pin_hsync = 0; - screen->pin_vsync = 0; - screen->pin_den = 0; - screen->pin_dclk = DCLK_POL; - - /* Swap rule */ - screen->swap_rb = SWAP_RB; - screen->swap_rg = 0; - screen->swap_gb = 0; - screen->swap_delta = 0; - screen->swap_dumy = 0; - - /* Operation function*/ - screen->init = NULL; - screen->standby = NULL; - screen->sscreen_get = set_scaler_info; - screen->sscreen_set = rk610_lcd_scaler_set_param; -} - - -size_t get_fb_size(void) -{ - size_t size = 0; - #if defined(CONFIG_THREE_FB_BUFFER) - size = ((H_VD)*(V_VD)<<2)* 3; //three buffer - #else - size = ((H_VD)*(V_VD)<<2)<<1; //two buffer - #endif - return ALIGN(size,SZ_1M); -} - +#include +#include +#include +#include +#include +#if defined(CONFIG_RK_HDMI) +#include "../../rockchip/hdmi/rk_hdmi.h" +#endif +#ifdef CONFIG_RK610_LVDS +#include "../transmitter/rk610_lcd.h" +#endif + + + +/* Base */ +#define OUT_TYPE SCREEN_LVDS + +#define OUT_FORMAT LVDS_8BIT_2 + +#define OUT_FACE OUT_D888_P666 +#define OUT_CLK 65000000 +#define LCDC_ACLK 500000000//312000000 //29 lcdc axi DMA ƵÂÊ + + +/* Timing */ +#define H_PW 10 +#define H_BP 10 +#define H_VD 1280 +#define H_FP 20 + +#define V_PW 10 +#define V_BP 10 +#define V_VD 800 +#define V_FP 13 + +#define LCD_WIDTH 202 +#define LCD_HEIGHT 152 + +/* scaler Timing */ +//1920*1080*60 + +#define S_OUT_CLK SCALE_RATE(148500000,66000000) //m=16 n=9 no=4 +#define S_H_PW 10 +#define S_H_BP 10 +#define S_H_VD 1280 +#define S_H_FP 20 + +#define S_V_PW 10 +#define S_V_BP 10 +#define S_V_VD 800 +#define S_V_FP 13 + +#define S_H_ST 440 +#define S_V_ST 13 + +//1920*1080*50 +#define S1_OUT_CLK SCALE_RATE(148500000,57375000) //m=17 n=11 no=4 +#define S1_H_PW 10 +#define S1_H_BP 10 +#define S1_H_VD 1280 +#define S1_H_FP 77 + +#define S1_V_PW 10 +#define S1_V_BP 10 +#define S1_V_VD 800 +#define S1_V_FP 13 + +#define S1_H_ST 459 +#define S1_V_ST 13 + +//1280*720*60 +#define S2_OUT_CLK SCALE_RATE(74250000,66000000) //m=32 n=9 no=4 +#define S2_H_PW 10 +#define S2_H_BP 10 +#define S2_H_VD 1280 +#define S2_H_FP 20 + +#define S2_V_PW 10 +#define S2_V_BP 10 +#define S2_V_VD 800 +#define S2_V_FP 13 + +#define S2_H_ST 440 +#define S2_V_ST 13 + +//1280*720*50 + +#define S3_OUT_CLK SCALE_RATE(74250000,57375000) // m=34 n=11 no=4 +#define S3_H_PW 10 +#define S3_H_BP 10 +#define S3_H_VD 1280 +#define S3_H_FP 77 + +#define S3_V_PW 10 +#define S3_V_BP 10 +#define S3_V_VD 800 +#define S3_V_FP 13 + +#define S3_H_ST 459 +#define S3_V_ST 13 + +//720*576*50 +#define S4_OUT_CLK SCALE_RATE(27000000,63281250) //m=75 n=4 no=8 +#define S4_H_PW 10 +#define S4_H_BP 10 +#define S4_H_VD 1280 +#define S4_H_FP 185 + +#define S4_V_PW 10 +#define S4_V_BP 10 +#define S4_V_VD 800 +#define S4_V_FP 48 + +#define S4_H_ST 81 +#define S4_V_ST 48 + +//720*480*60 +#define S5_OUT_CLK SCALE_RATE(27000000,75000000) //m=100 n=9 no=4 +#define S5_H_PW 10 +#define S5_H_BP 10 +#define S5_H_VD 1280 +#define S5_H_FP 130 + +#define S5_V_PW 10 +#define S5_V_BP 10 +#define S5_V_VD 800 +#define S5_V_FP 54 + +#define S5_H_ST 476 +#define S5_V_ST 48 + +#define S_DCLK_POL 0 + +/* Other */ +#define DCLK_POL 0 +#define DEN_POL 0 +#define VSYNC_POL 0 +#define HSYNC_POL 0 + +#define SWAP_RB 0 +#define SWAP_RG 0 +#define SWAP_GB 0 + + +#if ( defined(CONFIG_ONE_LCDC_DUAL_OUTPUT_INF)&& defined(CONFIG_RK610_LVDS) ) || defined(CONFIG_HDMI_DUAL_DISP) +static int set_scaler_info(struct rk29fb_screen *screen, u8 hdmi_resolution) +{ + screen->s_clk_inv = S_DCLK_POL; + screen->s_den_inv = 0; + screen->s_hv_sync_inv = 0; + switch(hdmi_resolution){ + case HDMI_1920x1080p_60Hz: + /* Scaler Timing */ + screen->hdmi_resolution = hdmi_resolution; + screen->s_pixclock = S_OUT_CLK; + screen->s_hsync_len = S_H_PW; + screen->s_left_margin = S_H_BP; + screen->s_right_margin = S_H_FP; + screen->s_hsync_len = S_H_PW; + screen->s_upper_margin = S_V_BP; + screen->s_lower_margin = S_V_FP; + screen->s_vsync_len = S_V_PW; + screen->s_hsync_st = S_H_ST; + screen->s_vsync_st = S_V_ST; + break; + case HDMI_1920x1080p_50Hz: + /* Scaler Timing */ + screen->hdmi_resolution = hdmi_resolution; + screen->s_pixclock = S1_OUT_CLK; + screen->s_hsync_len = S1_H_PW; + screen->s_left_margin = S1_H_BP; + screen->s_right_margin = S1_H_FP; + screen->s_hsync_len = S1_H_PW; + screen->s_upper_margin = S1_V_BP; + screen->s_lower_margin = S1_V_FP; + screen->s_vsync_len = S1_V_PW; + screen->s_hsync_st = S1_H_ST; + screen->s_vsync_st = S1_V_ST; + break; + case HDMI_1280x720p_60Hz: + /* Scaler Timing */ + screen->hdmi_resolution = hdmi_resolution; + screen->s_pixclock = S2_OUT_CLK; + screen->s_hsync_len = S2_H_PW; + screen->s_left_margin = S2_H_BP; + screen->s_right_margin = S2_H_FP; + screen->s_hsync_len = S2_H_PW; + screen->s_upper_margin = S2_V_BP; + screen->s_lower_margin = S2_V_FP; + screen->s_vsync_len = S2_V_PW; + screen->s_hsync_st = S2_H_ST; + screen->s_vsync_st = S2_V_ST; + break; + case HDMI_1280x720p_50Hz: + /* Scaler Timing */ + screen->hdmi_resolution = hdmi_resolution; + screen->s_pixclock = S3_OUT_CLK; + screen->s_hsync_len = S3_H_PW; + screen->s_left_margin = S3_H_BP; + screen->s_right_margin = S3_H_FP; + screen->s_hsync_len = S3_H_PW; + screen->s_upper_margin = S3_V_BP; + screen->s_lower_margin = S3_V_FP; + screen->s_vsync_len = S3_V_PW; + screen->s_hsync_st = S3_H_ST; + screen->s_vsync_st = S3_V_ST; + break; + case HDMI_720x576p_50Hz_4_3: + case HDMI_720x576p_50Hz_16_9: + /* Scaler Timing */ + screen->hdmi_resolution = hdmi_resolution; + screen->s_pixclock = S4_OUT_CLK; + screen->s_hsync_len = S4_H_PW; + screen->s_left_margin = S4_H_BP; + screen->s_right_margin = S4_H_FP; + screen->s_hsync_len = S4_H_PW; + screen->s_upper_margin = S4_V_BP; + screen->s_lower_margin = S4_V_FP; + screen->s_vsync_len = S4_V_PW; + screen->s_hsync_st = S4_H_ST; + screen->s_vsync_st = S4_V_ST; + break; + case HDMI_720x480p_60Hz_16_9: + case HDMI_720x480p_60Hz_4_3: + /* Scaler Timing */ + screen->hdmi_resolution = hdmi_resolution; + screen->s_pixclock = S5_OUT_CLK; + screen->s_hsync_len = S5_H_PW; + screen->s_left_margin = S5_H_BP; + screen->s_right_margin = S5_H_FP; + screen->s_hsync_len = S5_H_PW; + screen->s_upper_margin = S5_V_BP; + screen->s_lower_margin = S5_V_FP; + screen->s_vsync_len = S5_V_PW; + screen->s_hsync_st = S5_H_ST; + screen->s_vsync_st = S5_V_ST; + break; + default : + printk("%s lcd not support dual display at this hdmi resolution %d \n",__func__,hdmi_resolution); + return -1; + break; + } + + return 0; +} +#else +static int set_scaler_info(struct rk29fb_screen *screen, u8 hdmi_resolution){return 0;} +#endif +void set_lcd_info(struct rk29fb_screen *screen, struct rk29lcd_info *lcd_info ) +{ + /* screen type & face */ + screen->type = OUT_TYPE; + screen->face = OUT_FACE; + screen->hw_format = OUT_FORMAT; + + /* Screen size */ + screen->x_res = H_VD; + screen->y_res = V_VD; + + screen->width = LCD_WIDTH; + screen->height = LCD_HEIGHT; + + /* Timing */ + screen->lcdc_aclk = LCDC_ACLK; + screen->pixclock = OUT_CLK; + screen->left_margin = H_BP; + screen->right_margin = H_FP; + screen->hsync_len = H_PW; + screen->upper_margin = V_BP; + screen->lower_margin = V_FP; + screen->vsync_len = V_PW; + + /* Pin polarity */ + screen->pin_hsync = HSYNC_POL; + screen->pin_vsync = VSYNC_POL; + screen->pin_den = DEN_POL; + screen->pin_dclk = DCLK_POL; + + /* Swap rule */ + screen->swap_rb = SWAP_RB; + screen->swap_rg = SWAP_RG; + screen->swap_gb = SWAP_GB; + screen->swap_delta = 0; + screen->swap_dumy = 0; + + /* Operation function*/ + screen->init = NULL; + screen->standby = NULL; + screen->sscreen_get = set_scaler_info; +#ifdef CONFIG_RK610_LVDS + screen->sscreen_set = rk610_lcd_scaler_set_param; +#endif +} + + +size_t get_fb_size(void) +{ + size_t size = 0; + #if defined(CONFIG_THREE_FB_BUFFER) + size = ((H_VD)*(V_VD)<<2)* 3; //three buffer + #else + size = ((H_VD)*(V_VD)<<2)<<1; //two buffer + #endif + return ALIGN(size,SZ_1M); +} + diff --git a/drivers/video/display/screen/lcd_hdmi_800x480.c b/drivers/video/display/screen/lcd_hdmi_800x480.c index 8a374c0ceb6d..9d1e6574d091 100644 --- a/drivers/video/display/screen/lcd_hdmi_800x480.c +++ b/drivers/video/display/screen/lcd_hdmi_800x480.c @@ -1,12 +1,14 @@ -#include #include #include #include #include -#include "screen.h" -#include -#include "../../rk29_fb.h" +#if defined(CONFIG_RK_HDMI) +#include "../../rockchip/hdmi/rk_hdmi.h" +#endif +#ifdef CONFIG_RK610_LVDS #include "../transmitter/rk610_lcd.h" +#endif + /* Base */ #define OUT_TYPE SCREEN_RGB @@ -122,155 +124,162 @@ #define S_DCLK_POL 0 /* Other */ -#define DCLK_POL 0 -#define SWAP_RB 0 +#define DCLK_POL 0 +#define DEN_POL 0 +#define VSYNC_POL 0 +#define HSYNC_POL 0 + +#define SWAP_RB 0 +#define SWAP_RG 0 +#define SWAP_GB 0 + #if ( defined(CONFIG_ONE_LCDC_DUAL_OUTPUT_INF)&& defined(CONFIG_RK610_LVDS) ) || defined(CONFIG_HDMI_DUAL_DISP) static int set_scaler_info(struct rk29fb_screen *screen, u8 hdmi_resolution) { - screen->s_clk_inv = S_DCLK_POL; - screen->s_den_inv = 0; - screen->s_hv_sync_inv = 0; - switch(hdmi_resolution){ - case HDMI_1920x1080p_60Hz: - /* Scaler Timing */ - screen->hdmi_resolution = hdmi_resolution; - screen->s_pixclock = S_OUT_CLK; - screen->s_hsync_len = S_H_PW; - screen->s_left_margin = S_H_BP; - screen->s_right_margin = S_H_FP; - screen->s_hsync_len = S_H_PW; - screen->s_upper_margin = S_V_BP; - screen->s_lower_margin = S_V_FP; - screen->s_vsync_len = S_V_PW; - screen->s_hsync_st = S_H_ST; - screen->s_vsync_st = S_V_ST; - break; + screen->s_clk_inv = S_DCLK_POL; + screen->s_den_inv = 0; + screen->s_hv_sync_inv = 0; + switch(hdmi_resolution){ + case HDMI_1920x1080p_60Hz: + /* Scaler Timing */ + screen->hdmi_resolution = hdmi_resolution; + screen->s_pixclock = S_OUT_CLK; + screen->s_hsync_len = S_H_PW; + screen->s_left_margin = S_H_BP; + screen->s_right_margin = S_H_FP; + screen->s_hsync_len = S_H_PW; + screen->s_upper_margin = S_V_BP; + screen->s_lower_margin = S_V_FP; + screen->s_vsync_len = S_V_PW; + screen->s_hsync_st = S_H_ST; + screen->s_vsync_st = S_V_ST; + break; case HDMI_1920x1080p_50Hz: - /* Scaler Timing */ - screen->hdmi_resolution = hdmi_resolution; - screen->s_pixclock = S1_OUT_CLK; - screen->s_hsync_len = S1_H_PW; - screen->s_left_margin = S1_H_BP; - screen->s_right_margin = S1_H_FP; - screen->s_hsync_len = S1_H_PW; - screen->s_upper_margin = S1_V_BP; - screen->s_lower_margin = S1_V_FP; - screen->s_vsync_len = S1_V_PW; - screen->s_hsync_st = S1_H_ST; - screen->s_vsync_st = S1_V_ST; - break; - case HDMI_1280x720p_60Hz: - /* Scaler Timing */ - screen->hdmi_resolution = hdmi_resolution; - screen->s_pixclock = S2_OUT_CLK; - screen->s_hsync_len = S2_H_PW; - screen->s_left_margin = S2_H_BP; - screen->s_right_margin = S2_H_FP; - screen->s_hsync_len = S2_H_PW; - screen->s_upper_margin = S2_V_BP; - screen->s_lower_margin = S2_V_FP; - screen->s_vsync_len = S2_V_PW; - screen->s_hsync_st = S2_H_ST; - screen->s_vsync_st = S2_V_ST; - break; - case HDMI_1280x720p_50Hz: - /* Scaler Timing */ - screen->hdmi_resolution = hdmi_resolution; - screen->s_pixclock = S3_OUT_CLK; - screen->s_hsync_len = S3_H_PW; - screen->s_left_margin = S3_H_BP; - screen->s_right_margin = S3_H_FP; - screen->s_hsync_len = S3_H_PW; - screen->s_upper_margin = S3_V_BP; - screen->s_lower_margin = S3_V_FP; - screen->s_vsync_len = S3_V_PW; - screen->s_hsync_st = S3_H_ST; - screen->s_vsync_st = S3_V_ST; - break; - case HDMI_720x576p_50Hz_4x3: - case HDMI_720x576p_50Hz_16x9: - /* Scaler Timing */ - screen->hdmi_resolution = hdmi_resolution; - screen->s_pixclock = S4_OUT_CLK; - screen->s_hsync_len = S4_H_PW; - screen->s_left_margin = S4_H_BP; - screen->s_right_margin = S4_H_FP; - screen->s_hsync_len = S4_H_PW; - screen->s_upper_margin = S4_V_BP; - screen->s_lower_margin = S4_V_FP; - screen->s_vsync_len = S4_V_PW; - screen->s_hsync_st = S4_H_ST; - screen->s_vsync_st = S4_V_ST; - break; - case HDMI_720x480p_60Hz_16x9: - case HDMI_720x480p_60Hz_4x3: - /* Scaler Timing */ - screen->hdmi_resolution = hdmi_resolution; - screen->s_pixclock = S5_OUT_CLK; - screen->s_hsync_len = S5_H_PW; - screen->s_left_margin = S5_H_BP; - screen->s_right_margin = S5_H_FP; - screen->s_hsync_len = S5_H_PW; - screen->s_upper_margin = S5_V_BP; - screen->s_lower_margin = S5_V_FP; - screen->s_vsync_len = S5_V_PW; - screen->s_hsync_st = S5_H_ST; - screen->s_vsync_st = S5_V_ST; - break; - default : - printk("%s lcd not support dual display at this hdmi resolution %d \n",__func__,hdmi_resolution); - return -1; - break; + /* Scaler Timing */ + screen->hdmi_resolution = hdmi_resolution; + screen->s_pixclock = S1_OUT_CLK; + screen->s_hsync_len = S1_H_PW; + screen->s_left_margin = S1_H_BP; + screen->s_right_margin = S1_H_FP; + screen->s_hsync_len = S1_H_PW; + screen->s_upper_margin = S1_V_BP; + screen->s_lower_margin = S1_V_FP; + screen->s_vsync_len = S1_V_PW; + screen->s_hsync_st = S1_H_ST; + screen->s_vsync_st = S1_V_ST; + break; + case HDMI_1280x720p_60Hz: + /* Scaler Timing */ + screen->hdmi_resolution = hdmi_resolution; + screen->s_pixclock = S2_OUT_CLK; + screen->s_hsync_len = S2_H_PW; + screen->s_left_margin = S2_H_BP; + screen->s_right_margin = S2_H_FP; + screen->s_hsync_len = S2_H_PW; + screen->s_upper_margin = S2_V_BP; + screen->s_lower_margin = S2_V_FP; + screen->s_vsync_len = S2_V_PW; + screen->s_hsync_st = S2_H_ST; + screen->s_vsync_st = S2_V_ST; + break; + case HDMI_1280x720p_50Hz: + /* Scaler Timing */ + screen->hdmi_resolution = hdmi_resolution; + screen->s_pixclock = S3_OUT_CLK; + screen->s_hsync_len = S3_H_PW; + screen->s_left_margin = S3_H_BP; + screen->s_right_margin = S3_H_FP; + screen->s_hsync_len = S3_H_PW; + screen->s_upper_margin = S3_V_BP; + screen->s_lower_margin = S3_V_FP; + screen->s_vsync_len = S3_V_PW; + screen->s_hsync_st = S3_H_ST; + screen->s_vsync_st = S3_V_ST; + break; + case HDMI_720x576p_50Hz_4_3: + case HDMI_720x576p_50Hz_16_9: + /* Scaler Timing */ + screen->hdmi_resolution = hdmi_resolution; + screen->s_pixclock = S4_OUT_CLK; + screen->s_hsync_len = S4_H_PW; + screen->s_left_margin = S4_H_BP; + screen->s_right_margin = S4_H_FP; + screen->s_hsync_len = S4_H_PW; + screen->s_upper_margin = S4_V_BP; + screen->s_lower_margin = S4_V_FP; + screen->s_vsync_len = S4_V_PW; + screen->s_hsync_st = S4_H_ST; + screen->s_vsync_st = S4_V_ST; + break; + case HDMI_720x480p_60Hz_16_9: + case HDMI_720x480p_60Hz_4_3: + /* Scaler Timing */ + screen->hdmi_resolution = hdmi_resolution; + screen->s_pixclock = S5_OUT_CLK; + screen->s_hsync_len = S5_H_PW; + screen->s_left_margin = S5_H_BP; + screen->s_right_margin = S5_H_FP; + screen->s_hsync_len = S5_H_PW; + screen->s_upper_margin = S5_V_BP; + screen->s_lower_margin = S5_V_FP; + screen->s_vsync_len = S5_V_PW; + screen->s_hsync_st = S5_H_ST; + screen->s_vsync_st = S5_V_ST; + break; + default : + printk("%s lcd not support dual display at this hdmi resolution %d \n",__func__,hdmi_resolution); + return -1; + break; } return 0; } #else -static int set_scaler_info(struct rk29fb_screen *screen, u8 hdmi_resolution){} +static int set_scaler_info(struct rk29fb_screen *screen, u8 hdmi_resolution){return 0;} #endif void set_lcd_info(struct rk29fb_screen *screen, struct rk29lcd_info *lcd_info ) { - /* screen type & face */ - screen->type = OUT_TYPE; - screen->face = OUT_FACE; + /* screen type & face */ + screen->type = OUT_TYPE; + screen->face = OUT_FACE; - /* Screen size */ - screen->x_res = H_VD; - screen->y_res = V_VD; + /* Screen size */ + screen->x_res = H_VD; + screen->y_res = V_VD; - screen->width = LCD_WIDTH; - screen->height = LCD_HEIGHT; + screen->width = LCD_WIDTH; + screen->height = LCD_HEIGHT; - /* Timing */ - screen->lcdc_aclk = LCDC_ACLK; - screen->pixclock = OUT_CLK; + /* Timing */ + screen->lcdc_aclk = LCDC_ACLK; + screen->pixclock = OUT_CLK; screen->left_margin = H_BP; screen->right_margin = H_FP; screen->hsync_len = H_PW; screen->upper_margin = V_BP; screen->lower_margin = V_FP; screen->vsync_len = V_PW; - + /* Pin polarity */ - screen->pin_hsync = 0; - screen->pin_vsync = 0; - screen->pin_den = 0; + screen->pin_hsync = HSYNC_POL; + screen->pin_vsync = VSYNC_POL; + screen->pin_den = DEN_POL; screen->pin_dclk = DCLK_POL; /* Swap rule */ - screen->swap_rb = SWAP_RB; - screen->swap_rg = 0; - screen->swap_gb = 0; - screen->swap_delta = 0; - screen->swap_dumy = 0; - - /* Operation function*/ - screen->init = NULL; - screen->standby = NULL; - screen->sscreen_get = set_scaler_info; + screen->swap_rb = SWAP_RB; + screen->swap_rg = SWAP_RG; + screen->swap_gb = SWAP_GB; + screen->swap_delta = 0; + screen->swap_dumy = 0; + + /* Operation function*/ + screen->init = NULL; + screen->standby = NULL; + screen->sscreen_get = set_scaler_info; #ifdef CONFIG_RK610_LVDS screen->sscreen_set = rk610_lcd_scaler_set_param; #endif -- 2.34.1