From a28af2109e387808bf51900b004961579b66a1c9 Mon Sep 17 00:00:00 2001 From: wdc Date: Sun, 29 Sep 2013 14:47:02 +0800 Subject: [PATCH] rk31_vmac: sync with box --- arch/arm/mach-rk30/board-rk31-sdk-vmac.c | 146 ++++++++++++----------- arch/arm/mach-rk3188/board-rk3188-sdk.c | 5 +- 2 files changed, 77 insertions(+), 74 deletions(-) diff --git a/arch/arm/mach-rk30/board-rk31-sdk-vmac.c b/arch/arm/mach-rk30/board-rk31-sdk-vmac.c index 324fc09dbeee..56901da8876e 100644 --- a/arch/arm/mach-rk30/board-rk31-sdk-vmac.c +++ b/arch/arm/mach-rk30/board-rk31-sdk-vmac.c @@ -1,101 +1,103 @@ -#define grf_readl(offset) readl_relaxed(RK30_GRF_BASE + offset) -#define grf_writel(v, offset) do { writel_relaxed(v, RK30_GRF_BASE + offset); dsb(); } while (0) +//$_FOR_ROCKCHIP_RBOX_$ static int rk30_vmac_register_set(void) { - //config rk30 vmac as rmii - writel_relaxed(0x3 << 16 | 0x2, RK30_GRF_BASE + GRF_SOC_CON1); - return 0; + //config rk30 vmac as rmii + writel_relaxed(0x3 << 16 | 0x2, RK30_GRF_BASE + GRF_SOC_CON1); + int val = readl_relaxed(RK30_GRF_BASE + GRF_IO_CON3); + writel_relaxed(val | 0xf << 16 | 0xf, RK30_GRF_BASE + GRF_IO_CON3); + return 0; } static int rk30_rmii_io_init(void) { - int err; - long val; - printk("enter %s ",__func__); - iomux_set(GPIO0_C0);//power pwr - iomux_set(GPIO3_D2);//int - - iomux_set(RMII_MD);//IO3_D0 - iomux_set(RMII_MDCLK);//IO3_D1 - - iomux_set(RMII_RXD0); - iomux_set(RMII_RXD1); - iomux_set(RMII_CRS); - iomux_set(RMII_RXERR); - iomux_set(RMII_TXD0); - iomux_set(RMII_TXD1); - iomux_set(RMII_TXEN); - iomux_set(RMII_CLKOUT); + int err; + printk("enter %s ",__func__); - //rk3188 gpio3 and sdio drive strength , - val = grf_readl(GRF_IO_CON3); - grf_writel(val|(0x0f<<16)|0x0f, GRF_IO_CON3); - - //phy power gpio + iomux_set(RMII_TXEN); + iomux_set(RMII_TXD1); + iomux_set(RMII_TXD0); + iomux_set(RMII_RXD0); + iomux_set(RMII_RXD1); + iomux_set(RMII_CLKOUT); + iomux_set(RMII_RXERR); + iomux_set(RMII_CRS); + iomux_set(RMII_MD); + iomux_set(RMII_MDCLK); + + if(INVALID_GPIO != PHY_PWR_EN_GPIO) + { + //phy power gpio request + iomux_set(PHY_PWR_EN_IOMUX); err = gpio_request(PHY_PWR_EN_GPIO, "phy_power_en"); if (err) { - printk("request phy power en pin faile ! \n"); - return -1; + printk("request phy power en pin faile ! \n"); + return -1; } - //phy power down - gpio_direction_output(PHY_PWR_EN_GPIO, !PHY_PWR_EN_VALUE); - gpio_set_value(PHY_PWR_EN_GPIO, !PHY_PWR_EN_VALUE); + //phy power down + gpio_direction_output(PHY_PWR_EN_GPIO, !PHY_PWR_EN_VALUE); + } - return 0; + return 0; } static int rk30_rmii_io_deinit(void) { - //phy power down - printk("enter %s ",__func__); - gpio_direction_output(PHY_PWR_EN_GPIO, !PHY_PWR_EN_VALUE); - gpio_set_value(PHY_PWR_EN_GPIO, !PHY_PWR_EN_VALUE); - //free - gpio_free(PHY_PWR_EN_GPIO); - return 0; + //phy power down + printk("enter %s ",__func__); + + if(INVALID_GPIO != PHY_PWR_EN_GPIO) + { + gpio_direction_output(PHY_PWR_EN_GPIO, !PHY_PWR_EN_VALUE); + //free + gpio_free(PHY_PWR_EN_GPIO); + } + + return 0; } static int rk30_rmii_power_control(int enable) { - printk("enter %s ,enable = %d ",__func__,enable); - if (enable) { - //enable phy power - printk("power on phy\n"); - iomux_set(GPIO0_C0);//power pwr - iomux_set(GPIO3_D2);//int - - iomux_set(RMII_MD);//IO3_D0 - iomux_set(RMII_MDCLK);//IO3_D1 - - iomux_set(RMII_RXD0); - iomux_set(RMII_RXD1); - iomux_set(RMII_CRS); - iomux_set(RMII_RXERR); - iomux_set(RMII_TXD0); - iomux_set(RMII_TXD1); - iomux_set(RMII_TXEN); - iomux_set(RMII_CLKOUT); - - gpio_direction_output(PHY_PWR_EN_GPIO, PHY_PWR_EN_VALUE); - gpio_set_value(PHY_PWR_EN_GPIO, PHY_PWR_EN_VALUE); + printk("enter %s ,enable = %d ",__func__,enable); - //gpio reset - }else { - gpio_direction_output(PHY_PWR_EN_GPIO, !PHY_PWR_EN_VALUE); - gpio_set_value(PHY_PWR_EN_GPIO, !PHY_PWR_EN_VALUE); - } - return 0; + if (enable){ + iomux_set(RMII_TXEN); + iomux_set(RMII_TXD1); + iomux_set(RMII_TXD0); + iomux_set(RMII_RXD0); + iomux_set(RMII_RXD1); + iomux_set(RMII_CLKOUT); + iomux_set(RMII_RXERR); + iomux_set(RMII_CRS); + iomux_set(RMII_MD); + iomux_set(RMII_MDCLK); + + if(INVALID_GPIO != PHY_PWR_EN_GPIO) + { + //reset power + gpio_direction_output(PHY_PWR_EN_GPIO, !PHY_PWR_EN_VALUE); + msleep(20); + gpio_direction_output(PHY_PWR_EN_GPIO, PHY_PWR_EN_VALUE); + } + }else { + if(INVALID_GPIO != PHY_PWR_EN_GPIO) + { + gpio_direction_output(PHY_PWR_EN_GPIO, !PHY_PWR_EN_VALUE); + } + } + + return 0; } #define BIT_EMAC_SPEED (1 << 1) static int rk29_vmac_speed_switch(int speed) { - if (10 == speed) { - writel_relaxed(readl_relaxed(RK30_GRF_BASE + GRF_SOC_CON1) & (~BIT_EMAC_SPEED), RK30_GRF_BASE + GRF_SOC_CON1); - } else { - writel_relaxed(readl_relaxed(RK30_GRF_BASE + GRF_SOC_CON1) | ( BIT_EMAC_SPEED), RK30_GRF_BASE + GRF_SOC_CON1); - } + //printk("%s--speed=%d\n", __FUNCTION__, speed); + if (10 == speed) { + writel_relaxed(readl_relaxed(RK30_GRF_BASE + GRF_SOC_CON1) & (~BIT_EMAC_SPEED) | (BIT_EMAC_SPEED << 16), RK30_GRF_BASE + GRF_SOC_CON1); + } else { + writel_relaxed(readl_relaxed(RK30_GRF_BASE + GRF_SOC_CON1) | ( BIT_EMAC_SPEED) | (BIT_EMAC_SPEED << 16), RK30_GRF_BASE + GRF_SOC_CON1); + } } struct rk29_vmac_platform_data board_vmac_data = { diff --git a/arch/arm/mach-rk3188/board-rk3188-sdk.c b/arch/arm/mach-rk3188/board-rk3188-sdk.c index 9090e13e42fe..1b09ded5f642 100755 --- a/arch/arm/mach-rk3188/board-rk3188-sdk.c +++ b/arch/arm/mach-rk3188/board-rk3188-sdk.c @@ -1235,8 +1235,9 @@ struct platform_device pwm_regulator_device[1] = { #endif #ifdef CONFIG_RK29_VMAC -#define PHY_PWR_EN_GPIO RK30_PIN0_PC0 -#define PHY_PWR_EN_VALUE GPIO_HIGH +#define PHY_PWR_EN_GPIO RK30_PIN0_PC0 +#define PHY_PWR_EN_IOMUX GPIO0_C0 +#define PHY_PWR_EN_VALUE GPIO_HIGH #include "../mach-rk30/board-rk31-sdk-vmac.c" #endif -- 2.34.1