From a381e19663a480e171a4b43146f3bed667eddf56 Mon Sep 17 00:00:00 2001 From: WeiYong Bi Date: Sat, 25 Mar 2017 11:20:36 +0800 Subject: [PATCH] arm64: dts: rockchip: Add eDP node for rk3368 Change-Id: I0fa5ddc12cdbb2bf1d9fb0667222ead15071bdec Signed-off-by: WeiYong Bi --- arch/arm64/boot/dts/rockchip/rk3368.dtsi | 51 ++++++++++++++++++++++++ 1 file changed, 51 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi index 49dd3edf00cb..43ea7b2617bc 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi @@ -1053,6 +1053,16 @@ #address-cells = <1>; #size-cells = <1>; + edp_phy: edp-phy { + compatible = "rockchip,rk3368-dp-phy"; + clocks = <&cru SCLK_EDP_24M>; + clock-names = "24m"; + resets = <&cru SRST_EDP_24M>; + reset-names = "edp_24m"; + #phy-cells = <0>; + status = "disabled"; + }; + io_domains: io-domains { compatible = "rockchip,rk3368-io-voltage-domain"; status = "disabled"; @@ -1195,6 +1205,11 @@ reg = <0>; remote-endpoint = <&mipi_in_vop>; }; + + vop_out_edp: endpoint@1 { + reg = <1>; + remote-endpoint = <&edp_in_vop>; + }; }; }; @@ -1256,6 +1271,36 @@ status = "disabled"; }; + edp: edp@ff970000 { + compatible = "rockchip,rk3368-edp"; + reg = <0x0 0xff970000 0x0 0x8000>; + interrupts = ; + clocks = <&cru SCLK_EDP>, <&cru PCLK_EDP_CTRL>; + clock-names = "dp", "pclk"; + resets = <&cru SRST_EDP>; + reset-names = "dp"; + power-domains = <&power RK3368_PD_VIO>; + rockchip,grf = <&grf>; + phys = <&edp_phy>; + phy-names = "dp"; + pinctrl-names = "default"; + pinctrl-0 = <&edp_hpd>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + edp_in: port@0 { + reg = <0>; + + edp_in_vop: endpoint { + remote-endpoint = <&vop_out_edp>; + }; + }; + }; + }; + hevc_mmu: iommu@ff9a0440 { compatible = "rockchip,iommu"; reg = <0x0 0xff9a0440 0x0 0x40>, @@ -1482,6 +1527,12 @@ drive-strength = <12>; }; + edp { + edp_hpd: edp-hpd { + rockchip,pins = <2 23 RK_FUNC_2 &pcfg_pull_none>; + }; + }; + emmc { emmc_clk: emmc-clk { rockchip,pins = <2 4 RK_FUNC_2 &pcfg_pull_none>; -- 2.34.1