From a394117bc0a7a94d99869e2e83ff0647d3aff9a6 Mon Sep 17 00:00:00 2001 From: Dan Gohman Date: Tue, 24 Jul 2007 22:55:08 +0000 Subject: [PATCH] Use movaps to load a v4f32 build_vector of all-constant values into a register instead of loading each element individually. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40478 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86ISelLowering.cpp | 9 +++++++++ test/CodeGen/X86/v4f32-immediate.ll | 5 +++++ 2 files changed, 14 insertions(+) create mode 100644 test/CodeGen/X86/v4f32-immediate.ll diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index a25710ba5aa..23f9e9500c2 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -2495,6 +2495,7 @@ X86TargetLowering::LowerBUILD_VECTOR(SDOperand Op, SelectionDAG &DAG) { unsigned NumZero = 0; unsigned NumNonZero = 0; unsigned NonZeros = 0; + unsigned NumNonZeroImms = 0; std::set Values; for (unsigned i = 0; i < NumElems; ++i) { SDOperand Elt = Op.getOperand(i); @@ -2505,6 +2506,9 @@ X86TargetLowering::LowerBUILD_VECTOR(SDOperand Op, SelectionDAG &DAG) { else { NonZeros |= (1 << i); NumNonZero++; + if (Elt.getOpcode() == ISD::Constant || + Elt.getOpcode() == ISD::ConstantFP) + NumNonZeroImms++; } } } @@ -2548,6 +2552,11 @@ X86TargetLowering::LowerBUILD_VECTOR(SDOperand Op, SelectionDAG &DAG) { } } + // A vector full of immediates; various special cases are already + // handled, so this is best done with a single constant-pool load. + if (NumNonZero == NumNonZeroImms) + return SDOperand(); + // Let legalizer expand 2-wide build_vectors. if (EVTBits == 64) return SDOperand(); diff --git a/test/CodeGen/X86/v4f32-immediate.ll b/test/CodeGen/X86/v4f32-immediate.ll new file mode 100644 index 00000000000..67b5e79df86 --- /dev/null +++ b/test/CodeGen/X86/v4f32-immediate.ll @@ -0,0 +1,5 @@ +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse | grep movaps + +define <4 x float> @foo() { + ret <4 x float> +} -- 2.34.1