From a554b12b5976a2c74c056587bfce5a411626ef3e Mon Sep 17 00:00:00 2001 From: =?utf8?q?=E9=BB=84=E6=B6=9B?= Date: Thu, 22 May 2014 15:09:59 +0800 Subject: [PATCH] ARM: rockchip: fix rk3288 tsadc_int pinctrl --- arch/arm/boot/dts/rk3288-pinctrl.dtsi | 6 ++++++ include/dt-bindings/pinctrl/rockchip-rk3288.h | 17 +++++++++++++++-- 2 files changed, 21 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/rk3288-pinctrl.dtsi b/arch/arm/boot/dts/rk3288-pinctrl.dtsi index b5113f0ceb26..85982b9a5bbd 100755 --- a/arch/arm/boot/dts/rk3288-pinctrl.dtsi +++ b/arch/arm/boot/dts/rk3288-pinctrl.dtsi @@ -941,6 +941,12 @@ }; }; + gpio0_tsadc: gpio0-tsadc { + tsadc_int: tsadc-int { + rockchip,pins = ; + rockchip,pull = ; + }; + }; //to add diff --git a/include/dt-bindings/pinctrl/rockchip-rk3288.h b/include/dt-bindings/pinctrl/rockchip-rk3288.h index 21e284f32896..97aa66e2b329 100755 --- a/include/dt-bindings/pinctrl/rockchip-rk3288.h +++ b/include/dt-bindings/pinctrl/rockchip-rk3288.h @@ -31,18 +31,31 @@ #define GPIO0_A3 0x0a30 #define DDR1_RETENTION 0x0a31 +#define GPIO0_A4 0x0a40 + +#define GPIO0_A5 0x0a50 + +#define GPIO0_A6 0x0a60 + +#define GPIO0_A7 0x0a70 /* GPIO0_B */ #define GPIO0_B0 0x0b00 -#define TSADC_INT 0x0b01 + +#define GPIO0_B1 0x0b10 #define GPIO0_B2 0x0b20 -#define OTP_OUT 0x0b21 +#define TSADC_INT 0x0b21 + +#define GPIO0_B3 0x0b30 +#define GPIO0_B4 0x0b40 #define GPIO0_B5 0x0b50 #define CLK_27M 0x0b51 +#define GPIO0_B6 0x0b60 + #define GPIO0_B7 0x0b70 #define I2C0PMU_SDA 0x0b71 -- 2.34.1