From a836bdf9ae5aa3b100c8cdd04aae5bb9c0340145 Mon Sep 17 00:00:00 2001 From: Paulo Zanoni Date: Mon, 15 Oct 2012 15:51:32 -0300 Subject: [PATCH] drm/i915: add DP support to intel_ddi_disable_port Just a missing register. There is no problem to run this code when the output is HDMI. Signed-off-by: Paulo Zanoni Reviewed-by: Jani Nikula Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_ddi.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 510317270ad1..601ffc277a35 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -1138,14 +1138,23 @@ void intel_ddi_post_disable(struct intel_encoder *intel_encoder) struct drm_i915_private *dev_priv = encoder->dev->dev_private; enum port port = intel_ddi_get_encoder_port(intel_encoder); uint32_t val; + bool wait = false; val = I915_READ(DDI_BUF_CTL(port)); if (val & DDI_BUF_CTL_ENABLE) { val &= ~DDI_BUF_CTL_ENABLE; I915_WRITE(DDI_BUF_CTL(port), val); - intel_wait_ddi_buf_idle(dev_priv, port); + wait = true; } + val = I915_READ(DP_TP_CTL(port)); + val &= ~(DP_TP_CTL_ENABLE | DP_TP_CTL_LINK_TRAIN_MASK); + val |= DP_TP_CTL_LINK_TRAIN_PAT1; + I915_WRITE(DP_TP_CTL(port), val); + + if (wait) + intel_wait_ddi_buf_idle(dev_priv, port); + I915_WRITE(PORT_CLK_SEL(port), PORT_CLK_SEL_NONE); } -- 2.34.1