From a9461aae8f6b8fe78240a3d1a459a8a5cb499062 Mon Sep 17 00:00:00 2001 From: Douglas Anderson Date: Mon, 28 Sep 2015 09:26:04 -0700 Subject: [PATCH] CHROMIUM: drm: bridge/dw_hdmi: Reorder soft reset of i2c We should really do the reset of i2c before we set the speed. There are no actual known problems fixed by this, but it seems like a good idea and the latest upstream patch does this. BUG=chrome-os-partner:34741 TEST=HDMI vs. suspend/resume, broken monitor, HDCP, etc. Change-Id: I5207f39e074b7ab0d56d945bd1ae74d06f89c74b Signed-off-by: Douglas Anderson Reviewed-on: https://chromium-review.googlesource.com/302629 Commit-Ready: Yakir Yang Reviewed-by: Yakir Yang Signed-off-by: Yakir Yang --- drivers/gpu/drm/bridge/dw-hdmi.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/bridge/dw-hdmi.c b/drivers/gpu/drm/bridge/dw-hdmi.c index 361c8c804da3..502c8355cdc0 100644 --- a/drivers/gpu/drm/bridge/dw-hdmi.c +++ b/drivers/gpu/drm/bridge/dw-hdmi.c @@ -271,12 +271,12 @@ static void hdmi_mask_writeb(struct dw_hdmi *hdmi, u8 data, unsigned int reg, static void dw_hdmi_i2c_init(struct dw_hdmi *hdmi) { - /* Set Standard Mode speed */ - hdmi_writeb(hdmi, 0x03, HDMI_I2CM_DIV); - /* Software reset */ hdmi_writeb(hdmi, 0x00, HDMI_I2CM_SOFTRSTZ); + /* Set Standard Mode speed */ + hdmi_writeb(hdmi, 0x03, HDMI_I2CM_DIV); + /* Set done, not acknowledged and arbitration interrupt polarities */ hdmi_writeb(hdmi, HDMI_I2CM_INT_DONE_POL, HDMI_I2CM_INT); hdmi_writeb(hdmi, HDMI_I2CM_CTLINT_NAC_POL | HDMI_I2CM_CTLINT_ARB_POL, -- 2.34.1