From aa23732edd31a2a318dbcdf097e13118c9cdaebc Mon Sep 17 00:00:00 2001 From: Tom Stellard Date: Mon, 31 Mar 2014 14:01:56 +0000 Subject: [PATCH] R600/SI: Implement SIInstrInfo::isTriviallyRematerializable() git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205188 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/R600/SIInstrInfo.cpp | 12 ++++++++++++ lib/Target/R600/SIInstrInfo.h | 3 +++ 2 files changed, 15 insertions(+) diff --git a/lib/Target/R600/SIInstrInfo.cpp b/lib/Target/R600/SIInstrInfo.cpp index 336f6aa5667..c39b1dbb141 100644 --- a/lib/Target/R600/SIInstrInfo.cpp +++ b/lib/Target/R600/SIInstrInfo.cpp @@ -308,6 +308,18 @@ SIInstrInfo::isSafeToMoveRegClassDefs(const TargetRegisterClass *RC) const { return RC != &AMDGPU::EXECRegRegClass; } +bool +SIInstrInfo::isTriviallyReMaterializable(const MachineInstr *MI, + AliasAnalysis *AA) const { + switch(MI->getOpcode()) { + default: return AMDGPUInstrInfo::isTriviallyReMaterializable(MI, AA); + case AMDGPU::S_MOV_B32: + case AMDGPU::S_MOV_B64: + case AMDGPU::V_MOV_B32_e32: + return MI->getOperand(1).isImm(); + } +} + namespace llvm { namespace AMDGPU { // Helper function generated by tablegen. We are wrapping this with diff --git a/lib/Target/R600/SIInstrInfo.h b/lib/Target/R600/SIInstrInfo.h index 7cfb655b36b..d143b8a5106 100644 --- a/lib/Target/R600/SIInstrInfo.h +++ b/lib/Target/R600/SIInstrInfo.h @@ -77,6 +77,9 @@ public: virtual MachineInstr *commuteInstruction(MachineInstr *MI, bool NewMI=false) const; + bool isTriviallyReMaterializable(const MachineInstr *MI, + AliasAnalysis *AA = 0) const; + virtual unsigned getIEQOpcode() const { llvm_unreachable("Unimplemented"); } -- 2.34.1