From aaa8df4cad59e41bebba47ce2b4c74c1f0a23c77 Mon Sep 17 00:00:00 2001 From: Eric Christopher Date: Tue, 2 Nov 2010 01:21:28 +0000 Subject: [PATCH] No really, no thumb1 for arm fast isel. Also add an informative comment as to what someone would need to do to support thumb1. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117994 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMFastISel.cpp | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/lib/Target/ARM/ARMFastISel.cpp b/lib/Target/ARM/ARMFastISel.cpp index 5d85187a7b4..bb6b93ace7d 100644 --- a/lib/Target/ARM/ARMFastISel.cpp +++ b/lib/Target/ARM/ARMFastISel.cpp @@ -195,6 +195,9 @@ bool ARMFastISel::DefinesOptionalPredicate(MachineInstr *MI, bool *CPSR) { // If the machine is predicable go ahead and add the predicate operands, if // it needs default CC operands add those. +// TODO: If we want to support thumb1 then we'll need to deal with optional +// CPSR defs that need to be added before the remaining operands. See s_cc_out +// for descriptions why. const MachineInstrBuilder & ARMFastISel::AddOptionalDefs(const MachineInstrBuilder &MIB) { MachineInstr *MI = &*MIB; @@ -1761,8 +1764,6 @@ bool ARMFastISel::SelectCall(const Instruction *I) { // TODO: SoftFP support. bool ARMFastISel::TargetSelectInstruction(const Instruction *I) { - // No Thumb-1 for now. - if (isThumb && !AFI->isThumb2Function()) return false; switch (I->getOpcode()) { case Instruction::Load: @@ -1807,8 +1808,11 @@ namespace llvm { llvm::FastISel *ARM::createFastISel(FunctionLoweringInfo &funcInfo) { // Completely untested on non-darwin. const TargetMachine &TM = funcInfo.MF->getTarget(); + + // Darwin and thumb1 only for now. const ARMSubtarget *Subtarget = &TM.getSubtarget(); - if (Subtarget->isTargetDarwin() && !DisableARMFastISel) + if (Subtarget->isTargetDarwin() && !Subtarget->isThumb1Only() && + !DisableARMFastISel) return new ARMFastISel(funcInfo); return 0; } -- 2.34.1