From ab638645647bef87ffe8d545fbcb1b69d3af45ce Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Mon, 15 Nov 2010 03:48:58 +0000 Subject: [PATCH] remove asmstrings (which can never be printed) from pseudo instructions, allowing is to eliminate some dead operand printing methods from the instprinter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119113 91177308-0d34-0410-b5e6-96231b3b80d8 --- .../PowerPC/InstPrinter/PPCInstPrinter.cpp | 13 --- .../PowerPC/InstPrinter/PPCInstPrinter.h | 4 - lib/Target/PowerPC/PPCInstr64Bit.td | 37 +++---- lib/Target/PowerPC/PPCInstrInfo.td | 97 +++++++------------ 4 files changed, 48 insertions(+), 103 deletions(-) diff --git a/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp b/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp index 0af16cfc8e3..1cd3f00f203 100644 --- a/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp +++ b/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp @@ -302,16 +302,3 @@ void PPCInstPrinter::printSymbolHi(const MCInst *MI, unsigned OpNo, } -void PPCInstPrinter::PrintSpecial(const MCInst *MI, raw_ostream &O, - const char *Modifier) { - assert(0 && "FIXME: PrintSpecial should be dead"); -} -void PPCInstPrinter::printPICLabel(const MCInst *MI, unsigned OpNo, - raw_ostream &O) { - assert(0 && "FIXME: printPICLabel should be dead"); -} -void PPCInstPrinter::printTOCEntryLabel(const MCInst *MI, unsigned OpNo, - raw_ostream &O) { - assert(0 && "FIXME: printTOCEntryLabel should be dead"); -} - diff --git a/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.h b/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.h index abdc25349d3..aa668544514 100644 --- a/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.h +++ b/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.h @@ -64,12 +64,8 @@ public: void printMemRegReg(const MCInst *MI, unsigned OpNo, raw_ostream &O); // FIXME: Remove - void PrintSpecial(const MCInst *MI, raw_ostream &O, const char *Modifier); void printSymbolLo(const MCInst *MI, unsigned OpNo, raw_ostream &O); void printSymbolHi(const MCInst *MI, unsigned OpNo, raw_ostream &O); - void printPICLabel(const MCInst *MI, unsigned OpNo, raw_ostream &O); - void printTOCEntryLabel(const MCInst *MI, unsigned OpNo, raw_ostream &O); - }; } // end namespace llvm diff --git a/lib/Target/PowerPC/PPCInstr64Bit.td b/lib/Target/PowerPC/PPCInstr64Bit.td index 131baae69fd..53db7336564 100644 --- a/lib/Target/PowerPC/PPCInstr64Bit.td +++ b/lib/Target/PowerPC/PPCInstr64Bit.td @@ -58,7 +58,7 @@ def HI48_64 : SDNodeXForm, + def MovePCtoLR8 : Pseudo<(outs), (ins piclabel:$label), "", []>, PPC970_Unit_BRU; // Darwin ABI Calls. @@ -130,39 +130,31 @@ def : Pat<(PPCnop), let usesCustomInserter = 1 in { let Uses = [CR0] in { def ATOMIC_LOAD_ADD_I64 : Pseudo< - (outs G8RC:$dst), (ins memrr:$ptr, G8RC:$incr), - "${:comment} ATOMIC_LOAD_ADD_I64 PSEUDO!", + (outs G8RC:$dst), (ins memrr:$ptr, G8RC:$incr), "", [(set G8RC:$dst, (atomic_load_add_64 xoaddr:$ptr, G8RC:$incr))]>; def ATOMIC_LOAD_SUB_I64 : Pseudo< - (outs G8RC:$dst), (ins memrr:$ptr, G8RC:$incr), - "${:comment} ATOMIC_LOAD_SUB_I64 PSEUDO!", + (outs G8RC:$dst), (ins memrr:$ptr, G8RC:$incr), "", [(set G8RC:$dst, (atomic_load_sub_64 xoaddr:$ptr, G8RC:$incr))]>; def ATOMIC_LOAD_OR_I64 : Pseudo< - (outs G8RC:$dst), (ins memrr:$ptr, G8RC:$incr), - "${:comment} ATOMIC_LOAD_OR_I64 PSEUDO!", + (outs G8RC:$dst), (ins memrr:$ptr, G8RC:$incr), "", [(set G8RC:$dst, (atomic_load_or_64 xoaddr:$ptr, G8RC:$incr))]>; def ATOMIC_LOAD_XOR_I64 : Pseudo< - (outs G8RC:$dst), (ins memrr:$ptr, G8RC:$incr), - "${:comment} ATOMIC_LOAD_XOR_I64 PSEUDO!", + (outs G8RC:$dst), (ins memrr:$ptr, G8RC:$incr), "", [(set G8RC:$dst, (atomic_load_xor_64 xoaddr:$ptr, G8RC:$incr))]>; def ATOMIC_LOAD_AND_I64 : Pseudo< - (outs G8RC:$dst), (ins memrr:$ptr, G8RC:$incr), - "${:comment} ATOMIC_LOAD_AND_I64 PSEUDO!", + (outs G8RC:$dst), (ins memrr:$ptr, G8RC:$incr), "", [(set G8RC:$dst, (atomic_load_and_64 xoaddr:$ptr, G8RC:$incr))]>; def ATOMIC_LOAD_NAND_I64 : Pseudo< - (outs G8RC:$dst), (ins memrr:$ptr, G8RC:$incr), - "${:comment} ATOMIC_LOAD_NAND_I64 PSEUDO!", + (outs G8RC:$dst), (ins memrr:$ptr, G8RC:$incr), "", [(set G8RC:$dst, (atomic_load_nand_64 xoaddr:$ptr, G8RC:$incr))]>; def ATOMIC_CMP_SWAP_I64 : Pseudo< - (outs G8RC:$dst), (ins memrr:$ptr, G8RC:$old, G8RC:$new), - "${:comment} ATOMIC_CMP_SWAP_I64 PSEUDO!", + (outs G8RC:$dst), (ins memrr:$ptr, G8RC:$old, G8RC:$new), "", [(set G8RC:$dst, (atomic_cmp_swap_64 xoaddr:$ptr, G8RC:$old, G8RC:$new))]>; def ATOMIC_SWAP_I64 : Pseudo< - (outs G8RC:$dst), (ins memrr:$ptr, G8RC:$new), - "${:comment} ATOMIC_SWAP_I64 PSEUDO!", + (outs G8RC:$dst), (ins memrr:$ptr, G8RC:$new), "", [(set G8RC:$dst, (atomic_swap_64 xoaddr:$ptr, G8RC:$new))]>; } } @@ -240,8 +232,7 @@ def MTCTR8 : XFXForm_7_ext<31, 467, 9, (outs), (ins G8RC:$rS), } let Defs = [X1], Uses = [X1] in -def DYNALLOC8 : Pseudo<(outs G8RC:$result), (ins G8RC:$negsize, memri:$fpsi), - "${:comment} DYNALLOC8 $result, $negsize, $fpsi", +def DYNALLOC8 : Pseudo<(outs G8RC:$result), (ins G8RC:$negsize, memri:$fpsi),"", [(set G8RC:$result, (PPCdynalloc G8RC:$negsize, iaddr:$fpsi))]>; @@ -555,11 +546,9 @@ let canFoldAsLoad = 1, PPC970_Unit = 2 in { def LD : DSForm_1<58, 0, (outs G8RC:$rD), (ins memrix:$src), "ld $rD, $src", LdStLD, [(set G8RC:$rD, (load ixaddr:$src))]>, isPPC64; -// FIXME: This is a pseudo instruction. When the JIT switches to MC, remove its -// encoding information. -def LDtoc: DSForm_1<58, 0, (outs G8RC:$rD), (ins tocentry:$disp, G8RC:$reg), - "ld $rD, $disp($reg)", LdStLD, - [(set G8RC:$rD, +def LDtoc: Pseudo<(outs G8RC:$rD), (ins tocentry:$disp, G8RC:$reg), + "", + [(set G8RC:$rD, (PPCtoc_entry tglobaladdr:$disp, G8RC:$reg))]>, isPPC64; let RST = 2, DS = 8 in def LDinto_toc: DSForm_1<58, 0, (outs), (ins G8RC:$reg), diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td index a6156c0c339..8d9fa471322 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.td +++ b/lib/Target/PowerPC/PPCInstrInfo.td @@ -355,11 +355,9 @@ def In64BitMode : Predicate<"PPCSubTarget.isPPC64()">; let hasCtrlDep = 1 in { let Defs = [R1], Uses = [R1] in { -def ADJCALLSTACKDOWN : Pseudo<(outs), (ins u16imm:$amt), - "${:comment} ADJCALLSTACKDOWN", +def ADJCALLSTACKDOWN : Pseudo<(outs), (ins u16imm:$amt), "", [(callseq_start timm:$amt)]>; -def ADJCALLSTACKUP : Pseudo<(outs), (ins u16imm:$amt1, u16imm:$amt2), - "${:comment} ADJCALLSTACKUP", +def ADJCALLSTACKUP : Pseudo<(outs), (ins u16imm:$amt1, u16imm:$amt2), "", [(callseq_end timm:$amt1, timm:$amt2)]>; } @@ -368,8 +366,7 @@ def UPDATE_VRSAVE : Pseudo<(outs GPRC:$rD), (ins GPRC:$rS), } let Defs = [R1], Uses = [R1] in -def DYNALLOC : Pseudo<(outs GPRC:$result), (ins GPRC:$negsize, memri:$fpsi), - "${:comment} DYNALLOC $result, $negsize, $fpsi", +def DYNALLOC : Pseudo<(outs GPRC:$result), (ins GPRC:$negsize, memri:$fpsi), "", [(set GPRC:$result, (PPCdynalloc GPRC:$negsize, iaddr:$fpsi))]>; @@ -378,26 +375,26 @@ def DYNALLOC : Pseudo<(outs GPRC:$result), (ins GPRC:$negsize, memri:$fpsi), let usesCustomInserter = 1, // Expanded after instruction selection. PPC970_Single = 1 in { def SELECT_CC_I4 : Pseudo<(outs GPRC:$dst), (ins CRRC:$cond, GPRC:$T, GPRC:$F, - i32imm:$BROPC), "${:comment} SELECT_CC PSEUDO!", + i32imm:$BROPC), "", []>; def SELECT_CC_I8 : Pseudo<(outs G8RC:$dst), (ins CRRC:$cond, G8RC:$T, G8RC:$F, - i32imm:$BROPC), "${:comment} SELECT_CC PSEUDO!", + i32imm:$BROPC), "", []>; def SELECT_CC_F4 : Pseudo<(outs F4RC:$dst), (ins CRRC:$cond, F4RC:$T, F4RC:$F, - i32imm:$BROPC), "${:comment} SELECT_CC PSEUDO!", + i32imm:$BROPC), "", []>; def SELECT_CC_F8 : Pseudo<(outs F8RC:$dst), (ins CRRC:$cond, F8RC:$T, F8RC:$F, - i32imm:$BROPC), "${:comment} SELECT_CC PSEUDO!", + i32imm:$BROPC), "", []>; def SELECT_CC_VRRC: Pseudo<(outs VRRC:$dst), (ins CRRC:$cond, VRRC:$T, VRRC:$F, - i32imm:$BROPC), "${:comment} SELECT_CC PSEUDO!", + i32imm:$BROPC), "", []>; } // SPILL_CR - Indicate that we're dumping the CR register, so we'll need to // scavenge a register for it. def SPILL_CR : Pseudo<(outs), (ins GPRC:$cond, memri:$F), - "${:comment} SPILL_CR $cond $F", []>; + "", []>; let isTerminator = 1, isBarrier = 1, PPC970_Unit = 7 in { let isReturn = 1, Uses = [LR, RM] in @@ -409,7 +406,7 @@ let isTerminator = 1, isBarrier = 1, PPC970_Unit = 7 in { } let Defs = [LR] in - def MovePCtoLR : Pseudo<(outs), (ins piclabel:$label), "bl $label", []>, + def MovePCtoLR : Pseudo<(outs), (ins piclabel:$label), "", []>, PPC970_Unit_BRU; let isBranch = 1, isTerminator = 1, hasCtrlDep = 1, PPC970_Unit = 7 in { @@ -548,105 +545,81 @@ def DCBZL : DCB_Form<1014, 1, (outs), (ins memrr:$dst), let usesCustomInserter = 1 in { let Uses = [CR0] in { def ATOMIC_LOAD_ADD_I8 : Pseudo< - (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), - "${:comment} ATOMIC_LOAD_ADD_I8 PSEUDO!", + (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), "", [(set GPRC:$dst, (atomic_load_add_8 xoaddr:$ptr, GPRC:$incr))]>; def ATOMIC_LOAD_SUB_I8 : Pseudo< - (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), - "${:comment} ATOMIC_LOAD_SUB_I8 PSEUDO!", + (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), "", [(set GPRC:$dst, (atomic_load_sub_8 xoaddr:$ptr, GPRC:$incr))]>; def ATOMIC_LOAD_AND_I8 : Pseudo< - (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), - "${:comment} ATOMIC_LOAD_AND_I8 PSEUDO!", + (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), "", [(set GPRC:$dst, (atomic_load_and_8 xoaddr:$ptr, GPRC:$incr))]>; def ATOMIC_LOAD_OR_I8 : Pseudo< - (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), - "${:comment} ATOMIC_LOAD_OR_I8 PSEUDO!", + (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), "", [(set GPRC:$dst, (atomic_load_or_8 xoaddr:$ptr, GPRC:$incr))]>; def ATOMIC_LOAD_XOR_I8 : Pseudo< - (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), - "${:comment} ATOMIC_LOAD_XOR_I8 PSEUDO!", + (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), "", [(set GPRC:$dst, (atomic_load_xor_8 xoaddr:$ptr, GPRC:$incr))]>; def ATOMIC_LOAD_NAND_I8 : Pseudo< - (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), - "${:comment} ATOMIC_LOAD_NAND_I8 PSEUDO!", + (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), "", [(set GPRC:$dst, (atomic_load_nand_8 xoaddr:$ptr, GPRC:$incr))]>; def ATOMIC_LOAD_ADD_I16 : Pseudo< - (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), - "${:comment} ATOMIC_LOAD_ADD_I16 PSEUDO!", + (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), "", [(set GPRC:$dst, (atomic_load_add_16 xoaddr:$ptr, GPRC:$incr))]>; def ATOMIC_LOAD_SUB_I16 : Pseudo< - (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), - "${:comment} ATOMIC_LOAD_SUB_I16 PSEUDO!", + (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), "", [(set GPRC:$dst, (atomic_load_sub_16 xoaddr:$ptr, GPRC:$incr))]>; def ATOMIC_LOAD_AND_I16 : Pseudo< - (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), - "${:comment} ATOMIC_LOAD_AND_I16 PSEUDO!", + (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), "", [(set GPRC:$dst, (atomic_load_and_16 xoaddr:$ptr, GPRC:$incr))]>; def ATOMIC_LOAD_OR_I16 : Pseudo< - (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), - "${:comment} ATOMIC_LOAD_OR_I16 PSEUDO!", + (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), "", [(set GPRC:$dst, (atomic_load_or_16 xoaddr:$ptr, GPRC:$incr))]>; def ATOMIC_LOAD_XOR_I16 : Pseudo< - (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), - "${:comment} ATOMIC_LOAD_XOR_I16 PSEUDO!", + (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), "", [(set GPRC:$dst, (atomic_load_xor_16 xoaddr:$ptr, GPRC:$incr))]>; def ATOMIC_LOAD_NAND_I16 : Pseudo< - (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), - "${:comment} ATOMIC_LOAD_NAND_I16 PSEUDO!", + (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), "", [(set GPRC:$dst, (atomic_load_nand_16 xoaddr:$ptr, GPRC:$incr))]>; def ATOMIC_LOAD_ADD_I32 : Pseudo< - (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), - "${:comment} ATOMIC_LOAD_ADD_I32 PSEUDO!", + (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), "", [(set GPRC:$dst, (atomic_load_add_32 xoaddr:$ptr, GPRC:$incr))]>; def ATOMIC_LOAD_SUB_I32 : Pseudo< - (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), - "${:comment} ATOMIC_LOAD_SUB_I32 PSEUDO!", + (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), "", [(set GPRC:$dst, (atomic_load_sub_32 xoaddr:$ptr, GPRC:$incr))]>; def ATOMIC_LOAD_AND_I32 : Pseudo< - (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), - "${:comment} ATOMIC_LOAD_AND_I32 PSEUDO!", + (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), "", [(set GPRC:$dst, (atomic_load_and_32 xoaddr:$ptr, GPRC:$incr))]>; def ATOMIC_LOAD_OR_I32 : Pseudo< - (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), - "${:comment} ATOMIC_LOAD_OR_I32 PSEUDO!", + (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), "", [(set GPRC:$dst, (atomic_load_or_32 xoaddr:$ptr, GPRC:$incr))]>; def ATOMIC_LOAD_XOR_I32 : Pseudo< - (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), - "${:comment} ATOMIC_LOAD_XOR_I32 PSEUDO!", + (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), "", [(set GPRC:$dst, (atomic_load_xor_32 xoaddr:$ptr, GPRC:$incr))]>; def ATOMIC_LOAD_NAND_I32 : Pseudo< - (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), - "${:comment} ATOMIC_LOAD_NAND_I32 PSEUDO!", + (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), "", [(set GPRC:$dst, (atomic_load_nand_32 xoaddr:$ptr, GPRC:$incr))]>; def ATOMIC_CMP_SWAP_I8 : Pseudo< - (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$old, GPRC:$new), - "${:comment} ATOMIC_CMP_SWAP_I8 PSEUDO!", + (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$old, GPRC:$new), "", [(set GPRC:$dst, (atomic_cmp_swap_8 xoaddr:$ptr, GPRC:$old, GPRC:$new))]>; def ATOMIC_CMP_SWAP_I16 : Pseudo< - (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$old, GPRC:$new), - "${:comment} ATOMIC_CMP_SWAP_I16 PSEUDO!", + (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$old, GPRC:$new), "", [(set GPRC:$dst, (atomic_cmp_swap_16 xoaddr:$ptr, GPRC:$old, GPRC:$new))]>; def ATOMIC_CMP_SWAP_I32 : Pseudo< - (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$old, GPRC:$new), - "${:comment} ATOMIC_CMP_SWAP_I32 PSEUDO!", + (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$old, GPRC:$new), "", [(set GPRC:$dst, (atomic_cmp_swap_32 xoaddr:$ptr, GPRC:$old, GPRC:$new))]>; def ATOMIC_SWAP_I8 : Pseudo< - (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$new), - "${:comment} ATOMIC_SWAP_I8 PSEUDO!", + (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$new), "", [(set GPRC:$dst, (atomic_swap_8 xoaddr:$ptr, GPRC:$new))]>; def ATOMIC_SWAP_I16 : Pseudo< - (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$new), - "${:comment} ATOMIC_SWAP_I16 PSEUDO!", + (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$new), "", [(set GPRC:$dst, (atomic_swap_16 xoaddr:$ptr, GPRC:$new))]>; def ATOMIC_SWAP_I32 : Pseudo< - (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$new), - "${:comment} ATOMIC_SWAP_I32 PSEUDO!", + (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$new), "", [(set GPRC:$dst, (atomic_swap_32 xoaddr:$ptr, GPRC:$new))]>; } } @@ -1123,7 +1096,7 @@ def MTCRF : XFXForm_5<31, 144, (outs), (ins crbitm:$FXM, GPRC:$rS), // // FIXME: Make this a real Pseudo instruction when the JIT switches to MC. def MFCRpseud: XFXForm_3<31, 19, (outs GPRC:$rT), (ins crbitm:$FXM), - "mfcr $rT ${:comment} $FXM", SprMFCR>, + "", SprMFCR>, PPC970_MicroCode, PPC970_Unit_CRU; def MFCR : XFXForm_3<31, 19, (outs GPRC:$rT), (ins), -- 2.34.1