From ab7887703bb0b6d8d033660c24ae8273a6576d7a Mon Sep 17 00:00:00 2001 From: Feng Xiao Date: Wed, 9 Mar 2016 21:00:32 +0800 Subject: [PATCH] ARM64: dts: rockchip: rk3366: modify the initial rate of wifi pll There is a div2 behind wifi pll, so the initial rate should be 960MHz. Change-Id: Ib90457a0b17907c3056adf58edd623ae462b06a3 Signed-off-by: Feng Xiao --- arch/arm64/boot/dts/rockchip/rk3366.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3366.dtsi b/arch/arm64/boot/dts/rockchip/rk3366.dtsi index 5e95e4187db4..b86c33f97dc4 100644 --- a/arch/arm64/boot/dts/rockchip/rk3366.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3366.dtsi @@ -624,7 +624,7 @@ assigned-clock-rates = <750000000>, <576000000>, <594000000>, <594000000>, - <480000000>, <520000000>, + <960000000>, <520000000>, <375000000>, <288000000>, <100000000>, <100000000>; }; -- 2.34.1