From ad4bb96a12f4dcb1f0297234e9c18c9d1480bbbc Mon Sep 17 00:00:00 2001 From: Tom Stellard Date: Fri, 13 Feb 2015 21:02:36 +0000 Subject: [PATCH] R600/SI: Lowercase register names git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229151 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/R600/SIRegisterInfo.td | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/lib/Target/R600/SIRegisterInfo.td b/lib/Target/R600/SIRegisterInfo.td index 1a1efb0c89a..3b0971b11ad 100644 --- a/lib/Target/R600/SIRegisterInfo.td +++ b/lib/Target/R600/SIRegisterInfo.td @@ -21,7 +21,7 @@ def VCC_LO : SIReg<"vcc_lo", 106>; def VCC_HI : SIReg<"vcc_hi", 107>; // VCC for 64-bit instructions -def VCC : RegisterWithSubRegs<"VCC", [VCC_LO, VCC_HI]> { +def VCC : RegisterWithSubRegs<"vcc", [VCC_LO, VCC_HI]> { let Namespace = "AMDGPU"; let SubRegIndices = [sub0, sub1]; let HWEncoding = 106; @@ -36,14 +36,14 @@ def EXEC : RegisterWithSubRegs<"EXEC", [EXEC_LO, EXEC_HI]> { let HWEncoding = 126; } -def SCC : SIReg<"SCC", 253>; -def M0 : SIReg <"M0", 124>; +def SCC : SIReg<"scc", 253>; +def M0 : SIReg <"m0", 124>; def FLAT_SCR_LO : SIReg<"flat_scr_lo", 104>; // Offset in units of 256-bytes. def FLAT_SCR_HI : SIReg<"flat_scr_hi", 105>; // Size is the per-thread scratch size, in bytes. // Pair to indicate location of scratch space for flat accesses. -def FLAT_SCR : RegisterWithSubRegs <"FLAT_SCR", [FLAT_SCR_LO, FLAT_SCR_HI]> { +def FLAT_SCR : RegisterWithSubRegs <"flat_scr", [FLAT_SCR_LO, FLAT_SCR_HI]> { let Namespace = "AMDGPU"; let SubRegIndices = [sub0, sub1]; let HWEncoding = 104; -- 2.34.1