From b00f24b13c49fe1d7151a143fbb6213b3615c7ad Mon Sep 17 00:00:00 2001 From: Kalle Raiskila Date: Mon, 29 Nov 2010 10:08:09 +0000 Subject: [PATCH] Allow machine LICM to do its job on SPU. -return a sensible value for register pressure -add pattern to 'ila' instrucion git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120285 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/CellSPU/SPUISelLowering.h | 8 ++++++++ lib/Target/CellSPU/SPUInstrInfo.td | 2 +- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/lib/Target/CellSPU/SPUISelLowering.h b/lib/Target/CellSPU/SPUISelLowering.h index 82f10270db3..95d44afe37c 100644 --- a/lib/Target/CellSPU/SPUISelLowering.h +++ b/lib/Target/CellSPU/SPUISelLowering.h @@ -181,6 +181,14 @@ namespace llvm { virtual bool isLegalAddressingMode(const AddrMode &AM, const Type *Ty) const; + + /// After allocating this many registers, the allocator should feel + /// register pressure. The value is a somewhat random guess, based on the + /// number of non callee saved registers in the C calling convention. + virtual unsigned getRegPressureLimit( const TargetRegisterClass *RC, + MachineFunction &MF) const{ + return 50; + } }; } diff --git a/lib/Target/CellSPU/SPUInstrInfo.td b/lib/Target/CellSPU/SPUInstrInfo.td index 7794f9d4459..6e06e47c496 100644 --- a/lib/Target/CellSPU/SPUInstrInfo.td +++ b/lib/Target/CellSPU/SPUInstrInfo.td @@ -416,7 +416,7 @@ multiclass ImmLoadAddress def lo: ILARegInst; def lsa: ILAInst<(outs R32C:$rT), (ins symbolLSA:$val), - [/* no pattern */]>; + [(set R32C:$rT, imm18:$val)]>; } defm ILA : ImmLoadAddress; -- 2.34.1