From b31defe94caac68561344f78696be3a048413ec9 Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Tue, 5 Jan 2010 20:59:36 +0000 Subject: [PATCH] Remove livein checks from machine code verifier. A phi operand that is implicitly defined in a predecessor becomes an undefined register after phi elimination. This causes a lot of false positives when the verifier is checking if live-in registers are live-out from all predecessors. Removing the verifier checks seems like a better solution than insisting on IMPLICIT_DEF instructions in predecessor blocks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92769 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/MachineVerifier.cpp | 112 ++++---------------------------- 1 file changed, 13 insertions(+), 99 deletions(-) diff --git a/lib/CodeGen/MachineVerifier.cpp b/lib/CodeGen/MachineVerifier.cpp index 07723190463..584c21b7035 100644 --- a/lib/CodeGen/MachineVerifier.cpp +++ b/lib/CodeGen/MachineVerifier.cpp @@ -190,8 +190,7 @@ namespace { void report(const char *msg, const MachineOperand *MO, unsigned MONum); void markReachable(const MachineBasicBlock *MBB); - void calcMaxRegsPassed(); - void calcMinRegsPassed(); + void calcRegsPassed(); void checkPHIOps(const MachineBasicBlock *MBB); void calcRegsRequired(); @@ -710,7 +709,7 @@ MachineVerifier::visitMachineBasicBlockAfter(const MachineBasicBlock *MBB) { // Calculate the largest possible vregsPassed sets. These are the registers that // can pass through an MBB live, but may not be live every time. It is assumed // that all vregsPassed sets are empty before the call. -void MachineVerifier::calcMaxRegsPassed() { +void MachineVerifier::calcRegsPassed() { // First push live-out regs to successors' vregsPassed. Remember the MBBs that // have any vregsPassed. DenseSet todo; @@ -745,45 +744,9 @@ void MachineVerifier::calcMaxRegsPassed() { } } -// Calculate the minimum vregsPassed set. These are the registers that always -// pass live through an MBB. The calculation assumes that calcMaxRegsPassed has -// been called earlier. -void MachineVerifier::calcMinRegsPassed() { - DenseSet todo; - for (MachineFunction::const_iterator MFI = MF->begin(), MFE = MF->end(); - MFI != MFE; ++MFI) - todo.insert(MFI); - - while (!todo.empty()) { - const MachineBasicBlock *MBB = *todo.begin(); - todo.erase(MBB); - BBInfo &MInfo = MBBInfoMap[MBB]; - - // Remove entries from vRegsPassed that are not live out from all - // reachable predecessors. - RegSet dead; - for (RegSet::iterator I = MInfo.vregsPassed.begin(), - E = MInfo.vregsPassed.end(); I != E; ++I) { - for (MachineBasicBlock::const_pred_iterator PrI = MBB->pred_begin(), - PrE = MBB->pred_end(); PrI != PrE; ++PrI) { - BBInfo &PrInfo = MBBInfoMap[*PrI]; - if (PrInfo.reachable && !PrInfo.isLiveOut(*I)) { - dead.insert(*I); - break; - } - } - } - // If any regs removed, we need to recheck successors. - if (!dead.empty()) { - set_subtract(MInfo.vregsPassed, dead); - todo.insert(MBB->succ_begin(), MBB->succ_end()); - } - } -} - // Calculate the set of virtual registers that must be passed through each basic // block in order to satisfy the requirements of successor blocks. This is very -// similar to calcMaxRegsPassed, only backwards. +// similar to calcRegsPassed, only backwards. void MachineVerifier::calcRegsRequired() { // First push live-in regs to predecessors' vregsRequired. DenseSet todo; @@ -817,7 +780,7 @@ void MachineVerifier::calcRegsRequired() { } // Check PHI instructions at the beginning of MBB. It is assumed that -// calcMinRegsPassed has been run so BBInfo::isLiveOut is valid. +// calcRegsPassed has been run so BBInfo::isLiveOut is valid. void MachineVerifier::checkPHIOps(const MachineBasicBlock *MBB) { for (MachineBasicBlock::const_iterator BBI = MBB->begin(), BBE = MBB->end(); BBI != BBE && BBI->getOpcode() == TargetInstrInfo::PHI; ++BBI) { @@ -848,9 +811,8 @@ void MachineVerifier::checkPHIOps(const MachineBasicBlock *MBB) { } void MachineVerifier::visitMachineFunctionAfter() { - calcMaxRegsPassed(); + calcRegsPassed(); - // With the maximal set of vregsPassed we can verify dead-in registers. for (MachineFunction::const_iterator MFI = MF->begin(), MFE = MF->end(); MFI != MFE; ++MFI) { BBInfo &MInfo = MBBInfoMap[MFI]; @@ -859,31 +821,16 @@ void MachineVerifier::visitMachineFunctionAfter() { if (!MInfo.reachable) continue; - for (MachineBasicBlock::const_pred_iterator PrI = MFI->pred_begin(), - PrE = MFI->pred_end(); PrI != PrE; ++PrI) { - BBInfo &PrInfo = MBBInfoMap[*PrI]; - if (!PrInfo.reachable) - continue; - - // Verify physical live-ins. EH landing pads have magic live-ins so we - // ignore them. - if (!MFI->isLandingPad()) { - for (MachineBasicBlock::const_livein_iterator I = MFI->livein_begin(), - E = MFI->livein_end(); I != E; ++I) { - if (TargetRegisterInfo::isPhysicalRegister(*I) && - !isReserved (*I) && !PrInfo.isLiveOut(*I)) { - report("Live-in physical register is not live-out from predecessor", - MFI); - *OS << "Register " << TRI->getName(*I) - << " is not live-out from BB#" << (*PrI)->getNumber() - << ".\n"; - } - } - } + checkPHIOps(MFI); + // Verify dead-in virtual registers. + if (!allowVirtDoubleDefs) { + for (MachineBasicBlock::const_pred_iterator PrI = MFI->pred_begin(), + PrE = MFI->pred_end(); PrI != PrE; ++PrI) { + BBInfo &PrInfo = MBBInfoMap[*PrI]; + if (!PrInfo.reachable) + continue; - // Verify dead-in virtual registers. - if (!allowVirtDoubleDefs) { for (RegMap::iterator I = MInfo.vregsDeadIn.begin(), E = MInfo.vregsDeadIn.end(); I != E; ++I) { // DeadIn register must be in neither regsLiveOut or vregsPassed of @@ -899,39 +846,6 @@ void MachineVerifier::visitMachineFunctionAfter() { } } - calcMinRegsPassed(); - - // With the minimal set of vregsPassed we can verify live-in virtual - // registers, including PHI instructions. - for (MachineFunction::const_iterator MFI = MF->begin(), MFE = MF->end(); - MFI != MFE; ++MFI) { - BBInfo &MInfo = MBBInfoMap[MFI]; - - // Skip unreachable MBBs. - if (!MInfo.reachable) - continue; - - checkPHIOps(MFI); - - for (MachineBasicBlock::const_pred_iterator PrI = MFI->pred_begin(), - PrE = MFI->pred_end(); PrI != PrE; ++PrI) { - BBInfo &PrInfo = MBBInfoMap[*PrI]; - if (!PrInfo.reachable) - continue; - - for (RegMap::iterator I = MInfo.vregsLiveIn.begin(), - E = MInfo.vregsLiveIn.end(); I != E; ++I) { - if (!PrInfo.isLiveOut(I->first)) { - report("Used virtual register is not live-in", I->second); - *OS << "Register %reg" << I->first - << " is not live-out from predecessor MBB #" - << (*PrI)->getNumber() - << ".\n"; - } - } - } - } - // Now check LiveVariables info if available if (LiveVars) { calcRegsRequired(); -- 2.34.1