From b3a7f415a1fcfa9f755e004fdf3fa290bfe185e5 Mon Sep 17 00:00:00 2001 From: Feng Xiao Date: Thu, 10 Mar 2016 10:04:28 +0800 Subject: [PATCH] clk: rockchip: add clock ids for isp of RK3366 SoCs Change-Id: Ia1c1ef34eebcaa8f29d537b291c45654252444b8 Signed-off-by: Feng Xiao --- drivers/clk/rockchip/clk-rk3366.c | 3 +++ include/dt-bindings/clock/rk3366-cru.h | 1 + 2 files changed, 4 insertions(+) diff --git a/drivers/clk/rockchip/clk-rk3366.c b/drivers/clk/rockchip/clk-rk3366.c index 8d631e912097..fb45fcac947d 100644 --- a/drivers/clk/rockchip/clk-rk3366.c +++ b/drivers/clk/rockchip/clk-rk3366.c @@ -407,6 +407,9 @@ static struct rockchip_clk_branch rk3366_clk_branches[] __initdata = { RK3368_CLKSEL_CON(22), 6, 2, MFLAGS, 0, 6, DFLAGS, RK3368_CLKGATE_CON(4), 9, GFLAGS), + GATE(PCLK_ISP, "pclk_isp", "ext_isp", 0, + RK3368_CLKGATE_CON(17), 2, GFLAGS), + GATE(SCLK_HDMI_HDCP, "sclk_hdmi_hdcp", "xin24m", 0, RK3368_CLKGATE_CON(4), 13, GFLAGS), GATE(SCLK_HDMI_CEC, "sclk_hdmi_cec", "clk_32k", 0, diff --git a/include/dt-bindings/clock/rk3366-cru.h b/include/dt-bindings/clock/rk3366-cru.h index 8c7bf158fdcf..f3d99b854e39 100644 --- a/include/dt-bindings/clock/rk3366-cru.h +++ b/include/dt-bindings/clock/rk3366-cru.h @@ -163,6 +163,7 @@ #define PCLK_PERI0 362 #define PCLK_PERI1 363 #define PCLK_MIPI_DSI0 364 +#define PCLK_ISP 365 /* hclk gates */ #define HCLK_I2S_8CH 448 -- 2.34.1