From b445d0c9883c1cbb31351c5a6f3d749320f89d97 Mon Sep 17 00:00:00 2001 From: Alex Lorenz Date: Fri, 14 Aug 2015 21:55:58 +0000 Subject: [PATCH] MIR Serialization: Serialize the '.cfi_same_value' CFI directive. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245103 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/MIRParser/MILexer.cpp | 1 + lib/CodeGen/MIRParser/MILexer.h | 1 + lib/CodeGen/MIRParser/MIParser.cpp | 7 +++ lib/CodeGen/MIRPrinter.cpp | 6 ++ test/CodeGen/MIR/ARM/cfi-same-value.mir | 80 +++++++++++++++++++++++++ 5 files changed, 95 insertions(+) create mode 100644 test/CodeGen/MIR/ARM/cfi-same-value.mir diff --git a/lib/CodeGen/MIRParser/MILexer.cpp b/lib/CodeGen/MIRParser/MILexer.cpp index e15a4d1e753..f607edddecc 100644 --- a/lib/CodeGen/MIRParser/MILexer.cpp +++ b/lib/CodeGen/MIRParser/MILexer.cpp @@ -196,6 +196,7 @@ static MIToken::TokenKind getIdentifierKind(StringRef Identifier) { .Case("debug-use", MIToken::kw_debug_use) .Case("frame-setup", MIToken::kw_frame_setup) .Case("debug-location", MIToken::kw_debug_location) + .Case(".cfi_same_value", MIToken::kw_cfi_same_value) .Case(".cfi_offset", MIToken::kw_cfi_offset) .Case(".cfi_def_cfa_register", MIToken::kw_cfi_def_cfa_register) .Case(".cfi_def_cfa_offset", MIToken::kw_cfi_def_cfa_offset) diff --git a/lib/CodeGen/MIRParser/MILexer.h b/lib/CodeGen/MIRParser/MILexer.h index e7abbb2dd89..747e6523e4b 100644 --- a/lib/CodeGen/MIRParser/MILexer.h +++ b/lib/CodeGen/MIRParser/MILexer.h @@ -57,6 +57,7 @@ struct MIToken { kw_debug_use, kw_frame_setup, kw_debug_location, + kw_cfi_same_value, kw_cfi_offset, kw_cfi_def_cfa_register, kw_cfi_def_cfa_offset, diff --git a/lib/CodeGen/MIRParser/MIParser.cpp b/lib/CodeGen/MIRParser/MIParser.cpp index b27a55b705d..c6383720e23 100644 --- a/lib/CodeGen/MIRParser/MIParser.cpp +++ b/lib/CodeGen/MIRParser/MIParser.cpp @@ -1093,6 +1093,12 @@ bool MIParser::parseCFIOperand(MachineOperand &Dest) { unsigned Reg; unsigned CFIIndex; switch (Kind) { + case MIToken::kw_cfi_same_value: + if (parseCFIRegister(Reg)) + return true; + CFIIndex = + MMI.addFrameInst(MCCFIInstruction::createSameValue(nullptr, Reg)); + break; case MIToken::kw_cfi_offset: if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) || parseCFIOffset(Offset)) @@ -1273,6 +1279,7 @@ bool MIParser::parseMachineOperand(MachineOperand &Dest) { return parseExternalSymbolOperand(Dest); case MIToken::exclaim: return parseMetadataOperand(Dest); + case MIToken::kw_cfi_same_value: case MIToken::kw_cfi_offset: case MIToken::kw_cfi_def_cfa_register: case MIToken::kw_cfi_def_cfa_offset: diff --git a/lib/CodeGen/MIRPrinter.cpp b/lib/CodeGen/MIRPrinter.cpp index d70b5c412f1..248db52790e 100644 --- a/lib/CodeGen/MIRPrinter.cpp +++ b/lib/CodeGen/MIRPrinter.cpp @@ -794,6 +794,12 @@ static void printCFIRegister(unsigned DwarfReg, raw_ostream &OS, void MIPrinter::print(const MCCFIInstruction &CFI, const TargetRegisterInfo *TRI) { switch (CFI.getOperation()) { + case MCCFIInstruction::OpSameValue: + OS << ".cfi_same_value "; + if (CFI.getLabel()) + OS << " "; + printCFIRegister(CFI.getRegister(), OS, TRI); + break; case MCCFIInstruction::OpOffset: OS << ".cfi_offset "; if (CFI.getLabel()) diff --git a/test/CodeGen/MIR/ARM/cfi-same-value.mir b/test/CodeGen/MIR/ARM/cfi-same-value.mir new file mode 100644 index 00000000000..f9850abe046 --- /dev/null +++ b/test/CodeGen/MIR/ARM/cfi-same-value.mir @@ -0,0 +1,80 @@ +# RUN: llc -mtriple=arm-linux-unknown-gnueabi -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s + +--- | + declare void @dummy_use(i32*, i32) + + define void @test_basic() #0 { + entry: + %mem = alloca i32, i32 10 + call void @dummy_use(i32* %mem, i32 10) + ret void + } + + attributes #0 = { "split-stack" } +... +--- +name: test_basic +tracksRegLiveness: true +frameInfo: + stackSize: 48 + maxAlignment: 4 + adjustsStack: true + hasCalls: true +stack: + - { id: 0, name: mem, offset: -48, size: 40, alignment: 4 } + - { id: 1, type: spill-slot, offset: -4, size: 4, alignment: 4, + callee-saved-register: '%lr' } + - { id: 2, type: spill-slot, offset: -8, size: 4, alignment: 4, + callee-saved-register: '%r11' } +body: | + bb.0: + successors: %bb.2, %bb.1 + liveins: %r11, %lr + + %sp = STMDB_UPD %sp, 14, _, %r4, %r5 + CFI_INSTRUCTION .cfi_def_cfa_offset 8 + CFI_INSTRUCTION .cfi_offset %r5, -4 + CFI_INSTRUCTION .cfi_offset %r4, -8 + %r5 = MOVr %sp, 14, _, _ + %r4 = MRC 15, 0, 13, 0, 3, 14, _ + %r4 = LDRi12 %r4, 4, 14, _ + CMPrr %r4, %r5, 14, _, implicit-def %cpsr + Bcc %bb.2, 3, %cpsr + + bb.1: + successors: %bb.2 + liveins: %r11, %lr + + %r4 = MOVi 48, 14, _, _ + %r5 = MOVi 0, 14, _, _ + %sp = STMDB_UPD %sp, 14, _, %lr + CFI_INSTRUCTION .cfi_def_cfa_offset 12 + CFI_INSTRUCTION .cfi_offset %lr, -12 + BL $__morestack, implicit-def %lr, implicit %sp + %sp = LDMIA_UPD %sp, 14, _, %lr + %sp = LDMIA_UPD %sp, 14, _, %r4, %r5 + CFI_INSTRUCTION .cfi_def_cfa_offset 0 + BX_RET 14, _ + + bb.2: + liveins: %r11, %lr + + %sp = LDMIA_UPD %sp, 14, _, %r4, %r5 + CFI_INSTRUCTION .cfi_def_cfa_offset 0 + ; CHECK: CFI_INSTRUCTION .cfi_same_value %r4 + ; CHECK-NEXT: CFI_INSTRUCTION .cfi_same_value %r5 + CFI_INSTRUCTION .cfi_same_value %r4 + CFI_INSTRUCTION .cfi_same_value %r5 + %sp = frame-setup STMDB_UPD %sp, 14, _, killed %r11, killed %lr + frame-setup CFI_INSTRUCTION .cfi_def_cfa_offset 8 + frame-setup CFI_INSTRUCTION .cfi_offset %lr, -4 + frame-setup CFI_INSTRUCTION .cfi_offset %r11, -8 + %sp = frame-setup SUBri killed %sp, 40, 14, _, _ + frame-setup CFI_INSTRUCTION .cfi_def_cfa_offset 48 + %r0 = MOVr %sp, 14, _, _ + %r1 = MOVi 10, 14, _, _ + BL @dummy_use, csr_aapcs, implicit-def dead %lr, implicit %sp, implicit %r0, implicit killed %r1, implicit-def %sp + %sp = ADDri killed %sp, 40, 14, _, _ + %sp = LDMIA_UPD %sp, 14, _, %r4, %r5 + MOVPCLR 14, _ +... -- 2.34.1