From b46b03b36f50c11d5517024c1d0ef3763085eb90 Mon Sep 17 00:00:00 2001 From: Kevin Enderby Date: Fri, 19 Mar 2010 20:04:42 +0000 Subject: [PATCH] Fixed the encoding problems of the crc32 instructions. All had the Operand size override prefix and only the r/m16 forms should have had that. Also for variant one, the AT&T syntax, added suffixes to all forms. Also added the missing 64-bit form for 'CRC32 r64, r/m8'. Plus added test cases for all forms and tweaked one test case to add the needed suffixes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98980 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/IntrinsicsX86.td | 5 +- lib/Target/X86/X86InstrSSE.td | 51 ++++++++++------- test/CodeGen/X86/sse42.ll | 12 ++-- test/MC/AsmParser/X86/x86_32-bit_cat.s | 47 ++++++++-------- test/MC/AsmParser/X86/x86_32-encoding.s | 44 +++++++++++++++ test/MC/AsmParser/X86/x86_64-encoding.s | 73 +++++++++++++++++++++++++ test/MC/MachO/Darwin/x86_32_diff_as.s | 11 ++++ 7 files changed, 191 insertions(+), 52 deletions(-) create mode 100644 test/MC/AsmParser/X86/x86_64-encoding.s diff --git a/include/llvm/IntrinsicsX86.td b/include/llvm/IntrinsicsX86.td index 50ee3582b72..67abd955a1a 100644 --- a/include/llvm/IntrinsicsX86.td +++ b/include/llvm/IntrinsicsX86.td @@ -892,7 +892,10 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". def int_x86_sse42_crc32_32 : GCCBuiltin<"__builtin_ia32_crc32si">, Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; - def int_x86_sse42_crc32_64 : GCCBuiltin<"__builtin_ia32_crc32di">, + def int_x86_sse42_crc64_8 : + Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i8_ty], + [IntrNoMem]>; + def int_x86_sse42_crc64_64 : GCCBuiltin<"__builtin_ia32_crc32di">, Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty], [IntrNoMem]>; } diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td index 1c00a36e134..720b663a6aa 100644 --- a/lib/Target/X86/X86InstrSSE.td +++ b/lib/Target/X86/X86InstrSSE.td @@ -3823,54 +3823,65 @@ def : Pat<(v2i64 (X86pcmpgtq VR128:$src1, (memop addr:$src2))), let Constraints = "$src1 = $dst" in { def CRC32m8 : SS42FI<0xF0, MRMSrcMem, (outs GR32:$dst), (ins GR32:$src1, i8mem:$src2), - "crc32 \t{$src2, $src1|$src1, $src2}", + "crc32{b} \t{$src2, $src1|$src1, $src2}", [(set GR32:$dst, (int_x86_sse42_crc32_8 GR32:$src1, - (load addr:$src2)))]>, OpSize; + (load addr:$src2)))]>; def CRC32r8 : SS42FI<0xF0, MRMSrcReg, (outs GR32:$dst), (ins GR32:$src1, GR8:$src2), - "crc32 \t{$src2, $src1|$src1, $src2}", + "crc32{b} \t{$src2, $src1|$src1, $src2}", [(set GR32:$dst, - (int_x86_sse42_crc32_8 GR32:$src1, GR8:$src2))]>, - OpSize; + (int_x86_sse42_crc32_8 GR32:$src1, GR8:$src2))]>; def CRC32m16 : SS42FI<0xF1, MRMSrcMem, (outs GR32:$dst), (ins GR32:$src1, i16mem:$src2), - "crc32 \t{$src2, $src1|$src1, $src2}", + "crc32{w} \t{$src2, $src1|$src1, $src2}", [(set GR32:$dst, (int_x86_sse42_crc32_16 GR32:$src1, (load addr:$src2)))]>, OpSize; def CRC32r16 : SS42FI<0xF1, MRMSrcReg, (outs GR32:$dst), (ins GR32:$src1, GR16:$src2), - "crc32 \t{$src2, $src1|$src1, $src2}", + "crc32{w} \t{$src2, $src1|$src1, $src2}", [(set GR32:$dst, (int_x86_sse42_crc32_16 GR32:$src1, GR16:$src2))]>, OpSize; def CRC32m32 : SS42FI<0xF1, MRMSrcMem, (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2), - "crc32 \t{$src2, $src1|$src1, $src2}", + "crc32{l} \t{$src2, $src1|$src1, $src2}", [(set GR32:$dst, (int_x86_sse42_crc32_32 GR32:$src1, - (load addr:$src2)))]>, OpSize; + (load addr:$src2)))]>; def CRC32r32 : SS42FI<0xF1, MRMSrcReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "crc32 \t{$src2, $src1|$src1, $src2}", + "crc32{l} \t{$src2, $src1|$src1, $src2}", [(set GR32:$dst, - (int_x86_sse42_crc32_32 GR32:$src1, GR32:$src2))]>, - OpSize; - def CRC64m64 : SS42FI<0xF0, MRMSrcMem, (outs GR64:$dst), + (int_x86_sse42_crc32_32 GR32:$src1, GR32:$src2))]>; + def CRC64m8 : SS42FI<0xF0, MRMSrcMem, (outs GR64:$dst), + (ins GR64:$src1, i8mem:$src2), + "crc32{b} \t{$src2, $src1|$src1, $src2}", + [(set GR64:$dst, + (int_x86_sse42_crc64_8 GR64:$src1, + (load addr:$src2)))]>, + REX_W; + def CRC64r8 : SS42FI<0xF0, MRMSrcReg, (outs GR64:$dst), + (ins GR64:$src1, GR8:$src2), + "crc32{b} \t{$src2, $src1|$src1, $src2}", + [(set GR64:$dst, + (int_x86_sse42_crc64_8 GR64:$src1, GR8:$src2))]>, + REX_W; + def CRC64m64 : SS42FI<0xF1, MRMSrcMem, (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2), - "crc32 \t{$src2, $src1|$src1, $src2}", + "crc32{q} \t{$src2, $src1|$src1, $src2}", [(set GR64:$dst, - (int_x86_sse42_crc32_64 GR64:$src1, + (int_x86_sse42_crc64_64 GR64:$src1, (load addr:$src2)))]>, - OpSize, REX_W; - def CRC64r64 : SS42FI<0xF0, MRMSrcReg, (outs GR64:$dst), + REX_W; + def CRC64r64 : SS42FI<0xF1, MRMSrcReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "crc32 \t{$src2, $src1|$src1, $src2}", + "crc32{q} \t{$src2, $src1|$src1, $src2}", [(set GR64:$dst, - (int_x86_sse42_crc32_64 GR64:$src1, GR64:$src2))]>, - OpSize, REX_W; + (int_x86_sse42_crc64_64 GR64:$src1, GR64:$src2))]>, + REX_W; } // String/text processing instructions. diff --git a/test/CodeGen/X86/sse42.ll b/test/CodeGen/X86/sse42.ll index c9c4d012102..1723909a4b4 100644 --- a/test/CodeGen/X86/sse42.ll +++ b/test/CodeGen/X86/sse42.ll @@ -9,10 +9,10 @@ define i32 @crc32_8(i32 %a, i8 %b) nounwind { %tmp = call i32 @llvm.x86.sse42.crc32.8(i32 %a, i8 %b) ret i32 %tmp ; X32: _crc32_8: -; X32: crc32 8(%esp), %eax +; X32: crc32b 8(%esp), %eax ; X64: _crc32_8: -; X64: crc32 %sil, %eax +; X64: crc32b %sil, %eax } @@ -20,10 +20,10 @@ define i32 @crc32_16(i32 %a, i16 %b) nounwind { %tmp = call i32 @llvm.x86.sse42.crc32.16(i32 %a, i16 %b) ret i32 %tmp ; X32: _crc32_16: -; X32: crc32 8(%esp), %eax +; X32: crc32w 8(%esp), %eax ; X64: _crc32_16: -; X64: crc32 %si, %eax +; X64: crc32w %si, %eax } @@ -31,8 +31,8 @@ define i32 @crc32_32(i32 %a, i32 %b) nounwind { %tmp = call i32 @llvm.x86.sse42.crc32.32(i32 %a, i32 %b) ret i32 %tmp ; X32: _crc32_32: -; X32: crc32 8(%esp), %eax +; X32: crc32l 8(%esp), %eax ; X64: _crc32_32: -; X64: crc32 %esi, %eax +; X64: crc32l %esi, %eax } diff --git a/test/MC/AsmParser/X86/x86_32-bit_cat.s b/test/MC/AsmParser/X86/x86_32-bit_cat.s index 5429e8e23c6..e910c653e96 100644 --- a/test/MC/AsmParser/X86/x86_32-bit_cat.s +++ b/test/MC/AsmParser/X86/x86_32-bit_cat.s @@ -7756,41 +7756,38 @@ // CHECK: ptest %xmm5, %xmm5 ptest %xmm5,%xmm5 -// CHECK: crc32 3735928559(%ebx,%ecx,8), %ecx - crc32 0xdeadbeef(%ebx,%ecx,8),%ecx +// CHECK: crc32b %bl, %eax + crc32b %bl, %eax -// CHECK: crc32 69, %ecx - crc32 0x45,%ecx +// CHECK: crc32b 4(%ebx), %eax + crc32b 4(%ebx), %eax -// CHECK: crc32 32493, %ecx - crc32 0x7eed,%ecx +// CHECK: crc32w %bx, %eax + crc32w %bx, %eax -// CHECK: crc32 3133065982, %ecx - crc32 0xbabecafe,%ecx +// CHECK: crc32w 4(%ebx), %eax + crc32w 4(%ebx), %eax -// CHECK: crc32 305419896, %ecx - crc32 0x12345678,%ecx +// CHECK: crc32l %ebx, %eax + crc32l %ebx, %eax -// CHECK: crc32 %ecx, %ecx - crc32 %ecx,%ecx +// CHECK: crc32l 4(%ebx), %eax + crc32l 4(%ebx), %eax -// CHECK: crc32 %ecx, %ecx - crc32 %ecx,%ecx +// CHECK: crc32l 3735928559(%ebx,%ecx,8), %ecx + crc32l 0xdeadbeef(%ebx,%ecx,8),%ecx -// CHECK: crc32 3735928559(%ebx,%ecx,8), %ecx - crc32 0xdeadbeef(%ebx,%ecx,8),%ecx +// CHECK: crc32l 69, %ecx + crc32l 0x45,%ecx -// CHECK: crc32 69, %ecx - crc32 0x45,%ecx +// CHECK: crc32l 32493, %ecx + crc32l 0x7eed,%ecx -// CHECK: crc32 32493, %ecx - crc32 0x7eed,%ecx +// CHECK: crc32l 3133065982, %ecx + crc32l 0xbabecafe,%ecx -// CHECK: crc32 3133065982, %ecx - crc32 0xbabecafe,%ecx - -// CHECK: crc32 305419896, %ecx - crc32 0x12345678,%ecx +// CHECK: crc32l %ecx, %ecx + crc32l %ecx,%ecx // CHECK: pcmpgtq 3735928559(%ebx,%ecx,8), %xmm5 pcmpgtq 0xdeadbeef(%ebx,%ecx,8),%xmm5 diff --git a/test/MC/AsmParser/X86/x86_32-encoding.s b/test/MC/AsmParser/X86/x86_32-encoding.s index 7dacc750863..2088aa7bd55 100644 --- a/test/MC/AsmParser/X86/x86_32-encoding.s +++ b/test/MC/AsmParser/X86/x86_32-encoding.s @@ -9861,3 +9861,47 @@ // CHECK: pcmpgtq %xmm5, %xmm5 // CHECK: encoding: [0x66,0x0f,0x38,0x37,0xed] pcmpgtq %xmm5,%xmm5 + +// CHECK: crc32b %bl, %eax +// CHECK: encoding: [0xf2,0x0f,0x38,0xf0,0xc3] + crc32b %bl, %eax + +// CHECK: crc32b 4(%ebx), %eax +// CHECK: encoding: [0xf2,0x0f,0x38,0xf0,0x43,0x04] + crc32b 4(%ebx), %eax + +// CHECK: crc32w %bx, %eax +// CHECK: encoding: [0x66,0xf2,0x0f,0x38,0xf1,0xc3] + crc32w %bx, %eax + +// CHECK: crc32w 4(%ebx), %eax +// CHECK: encoding: [0x66,0xf2,0x0f,0x38,0xf1,0x43,0x04] + crc32w 4(%ebx), %eax + +// CHECK: crc32l %ebx, %eax +// CHECK: encoding: [0xf2,0x0f,0x38,0xf1,0xc3] + crc32l %ebx, %eax + +// CHECK: crc32l 4(%ebx), %eax +// CHECK: encoding: [0xf2,0x0f,0x38,0xf1,0x43,0x04] + crc32l 4(%ebx), %eax + +// CHECK: crc32l 3735928559(%ebx,%ecx,8), %ecx +// CHECK: encoding: [0xf2,0x0f,0x38,0xf1,0x8c,0xcb,0xef,0xbe,0xad,0xde] + crc32l 0xdeadbeef(%ebx,%ecx,8),%ecx + +// CHECK: crc32l 69, %ecx +// CHECK: encoding: [0xf2,0x0f,0x38,0xf1,0x0d,0x45,0x00,0x00,0x00] + crc32l 0x45,%ecx + +// CHECK: crc32l 32493, %ecx +// CHECK: encoding: [0xf2,0x0f,0x38,0xf1,0x0d,0xed,0x7e,0x00,0x00] + crc32l 0x7eed,%ecx + +// CHECK: crc32l 3133065982, %ecx +// CHECK: encoding: [0xf2,0x0f,0x38,0xf1,0x0d,0xfe,0xca,0xbe,0xba] + crc32l 0xbabecafe,%ecx + +// CHECK: crc32l %ecx, %ecx +// CHECK: encoding: [0xf2,0x0f,0x38,0xf1,0xc9] + crc32l %ecx,%ecx diff --git a/test/MC/AsmParser/X86/x86_64-encoding.s b/test/MC/AsmParser/X86/x86_64-encoding.s new file mode 100644 index 00000000000..3920c5b5f22 --- /dev/null +++ b/test/MC/AsmParser/X86/x86_64-encoding.s @@ -0,0 +1,73 @@ +// RUN: llvm-mc -triple x86_64-unknown-unknown --show-encoding %s | FileCheck %s + +// CHECK: crc32b %bl, %eax +// CHECK: encoding: [0xf2,0x0f,0x38,0xf0,0xc3] + crc32b %bl, %eax + +// CHECK: crc32b 4(%rbx), %eax +// CHECK: encoding: [0xf2,0x0f,0x38,0xf0,0x43,0x04] + crc32b 4(%rbx), %eax + +// CHECK: crc32w %bx, %eax +// CHECK: encoding: [0x66,0xf2,0x0f,0x38,0xf1,0xc3] + crc32w %bx, %eax + +// CHECK: crc32w 4(%rbx), %eax +// CHECK: encoding: [0x66,0xf2,0x0f,0x38,0xf1,0x43,0x04] + crc32w 4(%rbx), %eax + +// CHECK: crc32l %ebx, %eax +// CHECK: encoding: [0xf2,0x0f,0x38,0xf1,0xc3] + crc32l %ebx, %eax + +// CHECK: crc32l 4(%rbx), %eax +// CHECK: encoding: [0xf2,0x0f,0x38,0xf1,0x43,0x04] + crc32l 4(%rbx), %eax + +// CHECK: crc32l 3735928559(%rbx,%rcx,8), %ecx +// CHECK: encoding: [0xf2,0x0f,0x38,0xf1,0x8c,0xcb,0xef,0xbe,0xad,0xde] + crc32l 0xdeadbeef(%rbx,%rcx,8),%ecx + +// CHECK: crc32l 69, %ecx +// CHECK: encoding: [0xf2,0x0f,0x38,0xf1,0x0c,0x25,0x45,0x00,0x00,0x00] + crc32l 0x45,%ecx + +// CHECK: crc32l 32493, %ecx +// CHECK: encoding: [0xf2,0x0f,0x38,0xf1,0x0c,0x25,0xed,0x7e,0x00,0x00] + crc32l 0x7eed,%ecx + +// CHECK: crc32l 3133065982, %ecx +// CHECK: encoding: [0xf2,0x0f,0x38,0xf1,0x0c,0x25,0xfe,0xca,0xbe,0xba] + crc32l 0xbabecafe,%ecx + +// CHECK: crc32l %ecx, %ecx +// CHECK: encoding: [0xf2,0x0f,0x38,0xf1,0xc9] + crc32l %ecx,%ecx + +// CHECK: crc32b %r11b, %eax +// CHECK: encoding: [0xf2,0x41,0x0f,0x38,0xf0,0xc3] + crc32b %r11b, %eax + +// CHECK: crc32b 4(%rbx), %eax +// CHECK: encoding: [0xf2,0x0f,0x38,0xf0,0x43,0x04] + crc32b 4(%rbx), %eax + +// CHECK: crc32b %dil, %rax +// CHECK: encoding: [0xf2,0x48,0x0f,0x38,0xf0,0xc7] + crc32b %dil,%rax + +// CHECK: crc32b %r11b, %rax +// CHECK: encoding: [0xf2,0x49,0x0f,0x38,0xf0,0xc3] + crc32b %r11b,%rax + +// CHECK: crc32b 4(%rbx), %rax +// CHECK: encoding: [0xf2,0x48,0x0f,0x38,0xf0,0x43,0x04] + crc32b 4(%rbx), %rax + +// CHECK: crc32q %rbx, %rax +// CHECK: encoding: [0xf2,0x48,0x0f,0x38,0xf1,0xc3] + crc32q %rbx, %rax + +// CHECK: crc32q 4(%rbx), %rax +// CHECK: encoding: [0xf2,0x48,0x0f,0x38,0xf1,0x43,0x04] + crc32q 4(%rbx), %rax diff --git a/test/MC/MachO/Darwin/x86_32_diff_as.s b/test/MC/MachO/Darwin/x86_32_diff_as.s index 7fe75aae388..8bd7c2b71dc 100644 --- a/test/MC/MachO/Darwin/x86_32_diff_as.s +++ b/test/MC/MachO/Darwin/x86_32_diff_as.s @@ -549,3 +549,14 @@ ptest 0xdeadbeef(%ebx,%ecx,8),%xmm5 ptest %xmm5,%xmm5 pcmpgtq %xmm5,%xmm5 + crc32b %bl, %eax + crc32b 4(%ebx), %eax + crc32w %bx, %eax + crc32w 4(%ebx), %eax + crc32l %ebx, %eax + crc32l 4(%ebx), %eax + crc32l 0xdeadbeef(%ebx,%ecx,8),%ecx + crc32l 0x45,%ecx + crc32l 0x7eed,%ecx + crc32l 0xbabecafe,%ecx + crc32l %ecx,%ecx -- 2.34.1