From b571c837e6fd557647ec7c14d4e5aeb9188990f3 Mon Sep 17 00:00:00 2001 From: San Mehat Date: Thu, 20 Aug 2009 10:50:45 -0700 Subject: [PATCH] mtd: nand: Add naieve panic_write support for generic nand devices. Signed-off-by: San Mehat mtd: nand_base: fix nand_panic_wait fix the problem of nand_panic_wait Signed-off-by: Tom Zhu Signed-off-by: San Mehat --- drivers/mtd/nand/nand_base.c | 39 ++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index a46e9bb847bd..6516b08f0e71 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -3217,6 +3217,44 @@ int nand_scan_ident(struct mtd_info *mtd, int maxchips, } EXPORT_SYMBOL(nand_scan_ident); +static void nand_panic_wait(struct mtd_info *mtd) +{ + struct nand_chip *chip = mtd->priv; + int i; + + if (chip->state != FL_READY) + for (i = 0; i < 40; i++) { + if (chip->dev_ready(mtd)) + break; + mdelay(10); + } + chip->state = FL_READY; +} + +static int nand_panic_write(struct mtd_info *mtd, loff_t to, size_t len, + size_t *retlen, const u_char *buf) +{ + struct nand_chip *chip = mtd->priv; + int ret; + + /* Do not allow reads past end of device */ + if ((to + len) > mtd->size) + return -EINVAL; + if (!len) + return 0; + + nand_panic_wait(mtd); + + chip->ops.len = len; + chip->ops.datbuf = (uint8_t *)buf; + chip->ops.oobbuf = NULL; + + ret = nand_do_write_ops(mtd, to, &chip->ops); + + *retlen = chip->ops.retlen; + return ret; +} + /** * nand_scan_tail - [NAND Interface] Scan for the NAND device @@ -3460,6 +3498,7 @@ int nand_scan_tail(struct mtd_info *mtd) mtd->panic_write = panic_nand_write; mtd->read_oob = nand_read_oob; mtd->write_oob = nand_write_oob; + mtd->panic_write = nand_panic_write; mtd->sync = nand_sync; mtd->lock = NULL; mtd->unlock = NULL; -- 2.34.1