From b5d75790a5377f7a199f263d9b287c10d306c2ad Mon Sep 17 00:00:00 2001
From: Chih-Hung Hsieh <chh@google.com>
Date: Wed, 19 Aug 2015 01:44:51 +0000
Subject: [PATCH] Split ARM and AArch64 emutls.ll test

Differential Revision: http://reviews.llvm.org/D12127



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245399 91177308-0d34-0410-b5e6-96231b3b80d8
---
 test/CodeGen/AArch64/emutls.ll | 252 -----------------------------
 test/CodeGen/ARM/emutls.ll     | 288 +++++++++++++++++++++++++++++++++
 2 files changed, 288 insertions(+), 252 deletions(-)
 create mode 100644 test/CodeGen/ARM/emutls.ll

diff --git a/test/CodeGen/AArch64/emutls.ll b/test/CodeGen/AArch64/emutls.ll
index 40e7b88a0f8..ac5762edba9 100644
--- a/test/CodeGen/AArch64/emutls.ll
+++ b/test/CodeGen/AArch64/emutls.ll
@@ -1,5 +1,3 @@
-; RUN: llc -emulated-tls -mtriple=arm-linux-android \
-; RUN:     -relocation-model=pic < %s | FileCheck -check-prefix=ARM32 %s
 ; RUN: llc -emulated-tls -mtriple=aarch64-linux-android \
 ; RUN:     -relocation-model=pic < %s | FileCheck -check-prefix=ARM64 %s
 
@@ -10,13 +8,6 @@
 declare i8* @my_emutls_get_address(i8*)
 
 define i32 @my_get_xyz() {
-; ARM32-LABEL: my_get_xyz:
-; ARM32:        ldr r0,
-; ARM32-NEXT:   ldr r1,
-; ARM32:        add r0, pc, r0
-; ARM32-NEXT:   ldr r0, [r1, r0]
-; ARM32-NEXT:   bl my_emutls_get_address(PLT)
-; ARM32-NEXT:   ldr r0, [r0]
 ; ARM64-LABEL: my_get_xyz:
 ; ARM64:        adrp x0, :got:my_emutls_v_xyz
 ; ARM64-NEXT:   ldr x0, [x0, :got_lo12:my_emutls_v_xyz]
@@ -40,13 +31,6 @@ entry:
 @b1 = thread_local global i8 0
 
 define i32 @f1() {
-; ARM32-LABEL: f1:
-; ARM32:        ldr r0,
-; ARM32-NEXT:   ldr r1,
-; ARM32:        add r0, pc, r0
-; ARM32-NEXT:   ldr r0, [r1, r0]
-; ARM32-NEXT:   bl __emutls_get_address(PLT)
-; ARM32-NEXT:   ldr r0, [r0]
 ; ARM64-LABEL: f1:
 ; ARM64:        adrp x0, :got:__emutls_v.i1
 ; ARM64-NEXT:   ldr x0, [x0, :got_lo12:__emutls_v.i1]
@@ -60,13 +44,6 @@ entry:
 }
 
 define i32* @f2() {
-; ARM32-LABEL: f2:
-; ARM32:        ldr r0,
-; ARM32-NEXT:   ldr r1,
-; ARM32:        add r0, pc, r0
-; ARM32-NEXT:   ldr r0, [r1, r0]
-; ARM32-NEXT:   bl __emutls_get_address(PLT)
-; ARM32-NEXT:   pop
 ; ARM64-LABEL: f2:
 ; ARM64:        adrp x0, :got:__emutls_v.i1
 ; ARM64-NEXT:   ldr x0, [x0, :got_lo12:__emutls_v.i1]
@@ -77,235 +54,6 @@ entry:
   ret i32* @i1
 }
 
-define i32 @f3() nounwind {
-; ARM32-LABEL: f3:
-; ARM32:        ldr r0,
-; ARM32-NEXT:   ldr r1,
-; ARM32:        add r0, pc, r0
-; ARM32-NEXT:   ldr r0, [r1, r0]
-; ARM32-NEXT:   bl __emutls_get_address(PLT)
-; ARM32-NEXT:   ldr r0, [r0]
-
-entry:
-  %tmp1 = load i32, i32* @i2
-  ret i32 %tmp1
-}
-
-define i32* @f4() {
-; ARM32-LABEL: f4:
-; ARM32:        ldr r0,
-; ARM32-NEXT:   ldr r1,
-; ARM32:        add r0, pc, r0
-; ARM32-NEXT:   ldr r0, [r1, r0]
-; ARM32-NEXT:   bl __emutls_get_address(PLT)
-; ARM32-NEXT:   pop
-
-entry:
-  ret i32* @i2
-}
-
-define i32 @f5() nounwind {
-; ARM32-LABEL: f5:
-; ARM32:        ldr r0,
-; ARM32-NEXT:   ldr r1,
-; ARM32:        add r0, pc, r0
-; ARM32-NEXT:   ldr r0, [r1, r0]
-; ARM32-NEXT:   bl __emutls_get_address(PLT)
-; ARM32-NEXT:   ldr r0, [r0]
-
-entry:
-  %tmp1 = load i32, i32* @i3
-  ret i32 %tmp1
-}
-
-define i32* @f6() {
-; ARM32-LABEL: f6:
-; ARM32:        ldr r0,
-; ARM32-NEXT:   ldr r1,
-; ARM32:        add r0, pc, r0
-; ARM32-NEXT:   ldr r0, [r1, r0]
-; ARM32-NEXT:   bl __emutls_get_address(PLT)
-; ARM32-NEXT:   pop
-
-entry:
-  ret i32* @i3
-}
-
-define i32 @f7() {
-; ARM32-LABEL: f7:
-; ARM32:        ldr r0,
-; ARM32-NEXT:   ldr r1,
-; ARM32:        add r0, pc, r0
-; ARM32-NEXT:   ldr r0, [r1, r0]
-; ARM32-NEXT:   bl __emutls_get_address(PLT)
-; ARM32-NEXT:   ldr r0, [r0]
-
-entry:
-  %tmp1 = load i32, i32* @i4
-  ret i32 %tmp1
-}
-
-define i32* @f8() {
-; ARM32-LABEL: f8:
-; ARM32:        ldr r0,
-; ARM32-NEXT:   ldr r1,
-; ARM32:        add r0, pc, r0
-; ARM32-NEXT:   ldr r0, [r1, r0]
-; ARM32-NEXT:   bl __emutls_get_address(PLT)
-; ARM32-NEXT:   pop
-
-entry:
-  ret i32* @i4
-}
-
-define i32 @f9() {
-; ARM32-LABEL: f9:
-; ARM32:        ldr r0,
-; ARM32-NEXT:   ldr r1,
-; ARM32:        add r0, pc, r0
-; ARM32-NEXT:   ldr r0, [r1, r0]
-; ARM32-NEXT:   bl __emutls_get_address(PLT)
-; ARM32-NEXT:   ldr r0, [r0]
-
-entry:
-  %tmp1 = load i32, i32* @i5
-  ret i32 %tmp1
-}
-
-define i32* @f10() {
-; ARM32-LABEL: f10:
-; ARM32:        ldr r0,
-; ARM32-NEXT:   ldr r1,
-; ARM32:        add r0, pc, r0
-; ARM32-NEXT:   ldr r0, [r1, r0]
-; ARM32-NEXT:   bl __emutls_get_address(PLT)
-; ARM32-NEXT:   pop
-
-entry:
-  ret i32* @i5
-}
-
-define i16 @f11() {
-; ARM32-LABEL: f11:
-; ARM32:        ldr r0,
-; ARM32-NEXT:   ldr r1,
-; ARM32:        add r0, pc, r0
-; ARM32-NEXT:   ldr r0, [r1, r0]
-; ARM32-NEXT:   bl __emutls_get_address(PLT)
-; ARM32-NEXT:   ldrh r0, [r0]
-
-entry:
-  %tmp1 = load i16, i16* @s1
-  ret i16 %tmp1
-}
-
-define i32 @f12() {
-; ARM32-LABEL: f12:
-; ARM32:        ldr r0,
-; ARM32-NEXT:   ldr r1,
-; ARM32:        add r0, pc, r0
-; ARM32-NEXT:   ldr r0, [r1, r0]
-; ARM32-NEXT:   bl __emutls_get_address(PLT)
-; ARM32-NEXT:   ldrsh r0, [r0]
-
-entry:
-  %tmp1 = load i16, i16* @s1
-  %tmp2 = sext i16 %tmp1 to i32
-  ret i32 %tmp2
-}
-
-define i8 @f13() {
-; ARM32-LABEL: f13:
-; ARM32:        ldr r0,
-; ARM32-NEXT:   ldr r1,
-; ARM32:        add r0, pc, r0
-; ARM32-NEXT:   ldr r0, [r1, r0]
-; ARM32-NEXT:   bl __emutls_get_address(PLT)
-; ARM32-NEXT:   ldrb r0, [r0]
-; ARM32-NEXT: pop
-
-entry:
-  %tmp1 = load i8, i8* @b1
-  ret i8 %tmp1
-}
-
-define i32 @f14() {
-; ARM32-LABEL: f14:
-; ARM32:        ldr r0,
-; ARM32-NEXT:   ldr r1,
-; ARM32:        add r0, pc, r0
-; ARM32-NEXT:   ldr r0, [r1, r0]
-; ARM32-NEXT:   bl __emutls_get_address(PLT)
-; ARM32-NEXT:   ldrsb r0, [r0]
-; ARM32-NEXT: pop
-
-entry:
-  %tmp1 = load i8, i8* @b1
-  %tmp2 = sext i8 %tmp1 to i32
-  ret i32 %tmp2
-}
-
-;;;;;;;;;;;;;; 32-bit __emutls_v. and __emutls_t.
-
-; ARM32       .section .data.rel.local,
-; ARM32-LABEL: __emutls_v.i1:
-; ARM32-NEXT: .long 4
-; ARM32-NEXT: .long 4
-; ARM32-NEXT: .long 0
-; ARM32-NEXT: .long __emutls_t.i1
-
-; ARM32       .section .rodata,
-; ARM32-LABEL: __emutls_t.i1:
-; ARM32-NEXT: .long 15
-
-; ARM32-NOT:   __emutls_v.i2
-
-; ARM32       .section .data.rel.local,
-; ARM32-LABEL: __emutls_v.i3:
-; ARM32-NEXT: .long 4
-; ARM32-NEXT: .long 4
-; ARM32-NEXT: .long 0
-; ARM32-NEXT: .long __emutls_t.i3
-
-; ARM32       .section .rodata,
-; ARM32-LABEL: __emutls_t.i3:
-; ARM32-NEXT: .long 15
-
-; ARM32       .section .data.rel.local,
-; ARM32-LABEL: __emutls_v.i4:
-; ARM32-NEXT: .long 4
-; ARM32-NEXT: .long 4
-; ARM32-NEXT: .long 0
-; ARM32-NEXT: .long __emutls_t.i4
-
-; ARM32       .section .rodata,
-; ARM32-LABEL: __emutls_t.i4:
-; ARM32-NEXT: .long 15
-
-; ARM32-NOT:   __emutls_v.i5:
-; ARM32       .hidden __emutls_v.i5
-; ARM32-NOT:   __emutls_v.i5:
-
-; ARM32 .section .data.rel.local,
-; ARM32-LABEL: __emutls_v.s1:
-; ARM32-NEXT: .long 2
-; ARM32-NEXT: .long 2
-; ARM32-NEXT: .long 0
-; ARM32-NEXT: .long __emutls_t.s1
-
-; ARM32 .section .rodata,
-; ARM32-LABEL: __emutls_t.s1:
-; ARM32-NEXT: .short 15
-
-; ARM32 .section .data.rel.local,
-; ARM32-LABEL: __emutls_v.b1:
-; ARM32-NEXT: .long 1
-; ARM32-NEXT: .long 1
-; ARM32-NEXT: .long 0
-; ARM32-NEXT: .long 0
-
-; ARM32-NOT:   __emutls_t.b1
-
 ;;;;;;;;;;;;;; 64-bit __emutls_v. and __emutls_t.
 
 ; ARM64       .section .data.rel.local,
diff --git a/test/CodeGen/ARM/emutls.ll b/test/CodeGen/ARM/emutls.ll
new file mode 100644
index 00000000000..a313b8c68dd
--- /dev/null
+++ b/test/CodeGen/ARM/emutls.ll
@@ -0,0 +1,288 @@
+; RUN: llc -emulated-tls -mtriple=arm-linux-android \
+; RUN:     -relocation-model=pic < %s | FileCheck -check-prefix=ARM32 %s
+
+; Copied from X86/emutls.ll
+
+; Use my_emutls_get_address like __emutls_get_address.
+@my_emutls_v_xyz = external global i8*, align 4
+declare i8* @my_emutls_get_address(i8*)
+
+define i32 @my_get_xyz() {
+; ARM32-LABEL: my_get_xyz:
+; ARM32:        ldr r0,
+; ARM32-NEXT:   ldr r1,
+; ARM32:        add r0, pc, r0
+; ARM32-NEXT:   ldr r0, [r1, r0]
+; ARM32-NEXT:   bl my_emutls_get_address(PLT)
+; ARM32-NEXT:   ldr r0, [r0]
+
+entry:
+  %call = call i8* @my_emutls_get_address(i8* bitcast (i8** @my_emutls_v_xyz to i8*))
+  %0 = bitcast i8* %call to i32*
+  %1 = load i32, i32* %0, align 4
+  ret i32 %1
+}
+
+@i1 = thread_local global i32 15
+@i2 = external thread_local global i32
+@i3 = internal thread_local global i32 15
+@i4 = hidden thread_local global i32 15
+@i5 = external hidden thread_local global i32
+@s1 = thread_local global i16 15
+@b1 = thread_local global i8 0
+
+define i32 @f1() {
+; ARM32-LABEL: f1:
+; ARM32:        ldr r0,
+; ARM32-NEXT:   ldr r1,
+; ARM32:        add r0, pc, r0
+; ARM32-NEXT:   ldr r0, [r1, r0]
+; ARM32-NEXT:   bl __emutls_get_address(PLT)
+; ARM32-NEXT:   ldr r0, [r0]
+
+entry:
+  %tmp1 = load i32, i32* @i1
+  ret i32 %tmp1
+}
+
+define i32* @f2() {
+; ARM32-LABEL: f2:
+; ARM32:        ldr r0,
+; ARM32-NEXT:   ldr r1,
+; ARM32:        add r0, pc, r0
+; ARM32-NEXT:   ldr r0, [r1, r0]
+; ARM32-NEXT:   bl __emutls_get_address(PLT)
+; ARM32-NEXT:   pop
+
+entry:
+  ret i32* @i1
+}
+
+define i32 @f3() nounwind {
+; ARM32-LABEL: f3:
+; ARM32:        ldr r0,
+; ARM32-NEXT:   ldr r1,
+; ARM32:        add r0, pc, r0
+; ARM32-NEXT:   ldr r0, [r1, r0]
+; ARM32-NEXT:   bl __emutls_get_address(PLT)
+; ARM32-NEXT:   ldr r0, [r0]
+
+entry:
+  %tmp1 = load i32, i32* @i2
+  ret i32 %tmp1
+}
+
+define i32* @f4() {
+; ARM32-LABEL: f4:
+; ARM32:        ldr r0,
+; ARM32-NEXT:   ldr r1,
+; ARM32:        add r0, pc, r0
+; ARM32-NEXT:   ldr r0, [r1, r0]
+; ARM32-NEXT:   bl __emutls_get_address(PLT)
+; ARM32-NEXT:   pop
+
+entry:
+  ret i32* @i2
+}
+
+define i32 @f5() nounwind {
+; ARM32-LABEL: f5:
+; ARM32:        ldr r0,
+; ARM32-NEXT:   ldr r1,
+; ARM32:        add r0, pc, r0
+; ARM32-NEXT:   ldr r0, [r1, r0]
+; ARM32-NEXT:   bl __emutls_get_address(PLT)
+; ARM32-NEXT:   ldr r0, [r0]
+
+entry:
+  %tmp1 = load i32, i32* @i3
+  ret i32 %tmp1
+}
+
+define i32* @f6() {
+; ARM32-LABEL: f6:
+; ARM32:        ldr r0,
+; ARM32-NEXT:   ldr r1,
+; ARM32:        add r0, pc, r0
+; ARM32-NEXT:   ldr r0, [r1, r0]
+; ARM32-NEXT:   bl __emutls_get_address(PLT)
+; ARM32-NEXT:   pop
+
+entry:
+  ret i32* @i3
+}
+
+define i32 @f7() {
+; ARM32-LABEL: f7:
+; ARM32:        ldr r0,
+; ARM32-NEXT:   ldr r1,
+; ARM32:        add r0, pc, r0
+; ARM32-NEXT:   ldr r0, [r1, r0]
+; ARM32-NEXT:   bl __emutls_get_address(PLT)
+; ARM32-NEXT:   ldr r0, [r0]
+
+entry:
+  %tmp1 = load i32, i32* @i4
+  ret i32 %tmp1
+}
+
+define i32* @f8() {
+; ARM32-LABEL: f8:
+; ARM32:        ldr r0,
+; ARM32-NEXT:   ldr r1,
+; ARM32:        add r0, pc, r0
+; ARM32-NEXT:   ldr r0, [r1, r0]
+; ARM32-NEXT:   bl __emutls_get_address(PLT)
+; ARM32-NEXT:   pop
+
+entry:
+  ret i32* @i4
+}
+
+define i32 @f9() {
+; ARM32-LABEL: f9:
+; ARM32:        ldr r0,
+; ARM32-NEXT:   ldr r1,
+; ARM32:        add r0, pc, r0
+; ARM32-NEXT:   ldr r0, [r1, r0]
+; ARM32-NEXT:   bl __emutls_get_address(PLT)
+; ARM32-NEXT:   ldr r0, [r0]
+
+entry:
+  %tmp1 = load i32, i32* @i5
+  ret i32 %tmp1
+}
+
+define i32* @f10() {
+; ARM32-LABEL: f10:
+; ARM32:        ldr r0,
+; ARM32-NEXT:   ldr r1,
+; ARM32:        add r0, pc, r0
+; ARM32-NEXT:   ldr r0, [r1, r0]
+; ARM32-NEXT:   bl __emutls_get_address(PLT)
+; ARM32-NEXT:   pop
+
+entry:
+  ret i32* @i5
+}
+
+define i16 @f11() {
+; ARM32-LABEL: f11:
+; ARM32:        ldr r0,
+; ARM32-NEXT:   ldr r1,
+; ARM32:        add r0, pc, r0
+; ARM32-NEXT:   ldr r0, [r1, r0]
+; ARM32-NEXT:   bl __emutls_get_address(PLT)
+; ARM32-NEXT:   ldrh r0, [r0]
+
+entry:
+  %tmp1 = load i16, i16* @s1
+  ret i16 %tmp1
+}
+
+define i32 @f12() {
+; ARM32-LABEL: f12:
+; ARM32:        ldr r0,
+; ARM32-NEXT:   ldr r1,
+; ARM32:        add r0, pc, r0
+; ARM32-NEXT:   ldr r0, [r1, r0]
+; ARM32-NEXT:   bl __emutls_get_address(PLT)
+; ARM32-NEXT:   ldrsh r0, [r0]
+
+entry:
+  %tmp1 = load i16, i16* @s1
+  %tmp2 = sext i16 %tmp1 to i32
+  ret i32 %tmp2
+}
+
+define i8 @f13() {
+; ARM32-LABEL: f13:
+; ARM32:        ldr r0,
+; ARM32-NEXT:   ldr r1,
+; ARM32:        add r0, pc, r0
+; ARM32-NEXT:   ldr r0, [r1, r0]
+; ARM32-NEXT:   bl __emutls_get_address(PLT)
+; ARM32-NEXT:   ldrb r0, [r0]
+; ARM32-NEXT: pop
+
+entry:
+  %tmp1 = load i8, i8* @b1
+  ret i8 %tmp1
+}
+
+define i32 @f14() {
+; ARM32-LABEL: f14:
+; ARM32:        ldr r0,
+; ARM32-NEXT:   ldr r1,
+; ARM32:        add r0, pc, r0
+; ARM32-NEXT:   ldr r0, [r1, r0]
+; ARM32-NEXT:   bl __emutls_get_address(PLT)
+; ARM32-NEXT:   ldrsb r0, [r0]
+; ARM32-NEXT: pop
+
+entry:
+  %tmp1 = load i8, i8* @b1
+  %tmp2 = sext i8 %tmp1 to i32
+  ret i32 %tmp2
+}
+
+;;;;;;;;;;;;;; 32-bit __emutls_v. and __emutls_t.
+
+; ARM32       .section .data.rel.local,
+; ARM32-LABEL: __emutls_v.i1:
+; ARM32-NEXT: .long 4
+; ARM32-NEXT: .long 4
+; ARM32-NEXT: .long 0
+; ARM32-NEXT: .long __emutls_t.i1
+
+; ARM32       .section .rodata,
+; ARM32-LABEL: __emutls_t.i1:
+; ARM32-NEXT: .long 15
+
+; ARM32-NOT:   __emutls_v.i2
+
+; ARM32       .section .data.rel.local,
+; ARM32-LABEL: __emutls_v.i3:
+; ARM32-NEXT: .long 4
+; ARM32-NEXT: .long 4
+; ARM32-NEXT: .long 0
+; ARM32-NEXT: .long __emutls_t.i3
+
+; ARM32       .section .rodata,
+; ARM32-LABEL: __emutls_t.i3:
+; ARM32-NEXT: .long 15
+
+; ARM32       .section .data.rel.local,
+; ARM32-LABEL: __emutls_v.i4:
+; ARM32-NEXT: .long 4
+; ARM32-NEXT: .long 4
+; ARM32-NEXT: .long 0
+; ARM32-NEXT: .long __emutls_t.i4
+
+; ARM32       .section .rodata,
+; ARM32-LABEL: __emutls_t.i4:
+; ARM32-NEXT: .long 15
+
+; ARM32-NOT:   __emutls_v.i5:
+; ARM32       .hidden __emutls_v.i5
+; ARM32-NOT:   __emutls_v.i5:
+
+; ARM32 .section .data.rel.local,
+; ARM32-LABEL: __emutls_v.s1:
+; ARM32-NEXT: .long 2
+; ARM32-NEXT: .long 2
+; ARM32-NEXT: .long 0
+; ARM32-NEXT: .long __emutls_t.s1
+
+; ARM32 .section .rodata,
+; ARM32-LABEL: __emutls_t.s1:
+; ARM32-NEXT: .short 15
+
+; ARM32 .section .data.rel.local,
+; ARM32-LABEL: __emutls_v.b1:
+; ARM32-NEXT: .long 1
+; ARM32-NEXT: .long 1
+; ARM32-NEXT: .long 0
+; ARM32-NEXT: .long 0
+
+; ARM32-NOT:   __emutls_t.b1
-- 
2.34.1