From b75f5f7d5d3737c309937297c4d4e360153512bd Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper@gmail.com>
Date: Thu, 29 Dec 2011 18:08:36 +0000
Subject: [PATCH] Mark non-VEX forms of PCLMUL instructions as requiring SSE2
 to be enabled along with CLMUL. That's required for the XMM registers to be
 valid for integer data. Doesn't change any behavior since the CLMUL
 instructions don't have patterns yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147345 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/X86/X86InstrFormats.td | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/Target/X86/X86InstrFormats.td b/lib/Target/X86/X86InstrFormats.td
index 739fa3521f9..b3a70871ced 100644
--- a/lib/Target/X86/X86InstrFormats.td
+++ b/lib/Target/X86/X86InstrFormats.td
@@ -494,7 +494,7 @@ class AESAI<bits<8> o, Format F, dag outs, dag ins, string asm,
 class CLMULIi8<bits<8> o, Format F, dag outs, dag ins, string asm,
                list<dag>pattern>
       : Ii8<o, F, outs, ins, asm, pattern, SSEPackedInt>, TA,
-        OpSize, Requires<[HasCLMUL]>;
+        OpSize, Requires<[HasSSE2, HasCLMUL]>;
 
 class AVXCLMULIi8<bits<8> o, Format F, dag outs, dag ins, string asm,
                   list<dag>pattern>
-- 
2.34.1