From b882752bd04602249d391699dc7183de007f8964 Mon Sep 17 00:00:00 2001
From: Nate Begeman <natebegeman@mac.com>
Date: Tue, 12 Apr 2005 23:12:17 +0000
Subject: [PATCH] Fold shift by size larger than type size to undef Make llvm
 undef values generate ISD::UNDEF nodes

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21261 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/CodeGen/SelectionDAG/SelectionDAG.cpp     | 15 ++++-----------
 lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp |  9 +--------
 lib/Target/PowerPC/PPCISelPattern.cpp         |  1 -
 3 files changed, 5 insertions(+), 20 deletions(-)

diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 634197c0f96..613d0983ad6 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -755,19 +755,12 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
 
     case ISD::SHL:
     case ISD::SRL:
-      // If the shift amount is bigger than the size of the data, simplify.
+    case ISD::SRA:
+      // If the shift amount is bigger than the size of the data, then all the
+      // bits are shifted out.  Simplify to loading constant zero.
       if (C2 >= MVT::getSizeInBits(N1.getValueType())) {
-        if (TLI.getShiftAmountFlavor() == TargetLowering::Mask) {
-          unsigned NewAmt =
-            C2 & ((1 << MVT::getSizeInBits(N1.getValueType()))-1);
-          return getNode(Opcode, VT, N1, getConstant(NewAmt,N2.getValueType()));
-        } else if (TLI.getShiftAmountFlavor() == TargetLowering::Extend) {
-          // Shifting all of the bits out?
-          return getConstant(0, N1.getValueType());
-        }
+        return getNode(ISD::UNDEF, N1.getValueType());
       }
-      // FALL THROUGH.
-    case ISD::SRA:
       if (C2 == 0) return N1;
       break;
 
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index bfceecb7aaf..f041905bb32 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -266,14 +266,7 @@ public:
       } else if (isa<ConstantPointerNull>(C)) {
         return N = DAG.getConstant(0, TLI.getPointerTy());
       } else if (isa<UndefValue>(C)) {
-	/// FIXME: Implement UNDEFVALUE better.
-        if (MVT::isInteger(VT))
-          return N = DAG.getConstant(0, VT);
-        else if (MVT::isFloatingPoint(VT))
-          return N = DAG.getConstantFP(0, VT);
-        else
-          assert(0 && "Unknown value type!");
-
+        return N = DAG.getNode(ISD::UNDEF, VT);
       } else if (ConstantFP *CFP = dyn_cast<ConstantFP>(C)) {
         return N = DAG.getConstantFP(CFP->getValue(), VT);
       } else {
diff --git a/lib/Target/PowerPC/PPCISelPattern.cpp b/lib/Target/PowerPC/PPCISelPattern.cpp
index 9788d67cf1c..a2b1e739bdc 100644
--- a/lib/Target/PowerPC/PPCISelPattern.cpp
+++ b/lib/Target/PowerPC/PPCISelPattern.cpp
@@ -61,7 +61,6 @@ namespace {
       setOperationAction(ISD::SREM, MVT::i32, Expand);
       setOperationAction(ISD::UREM, MVT::i32, Expand);
 
-      setShiftAmountFlavor(Extend);   // shl X, 32 == 0
       setSetCCResultContents(ZeroOrOneSetCCResult);
       addLegalFPImmediate(+0.0); // Necessary for FSEL
       addLegalFPImmediate(-0.0); // 
-- 
2.34.1