From bb3fdd87434ef3d7251c72c49cc50cf066345ffe Mon Sep 17 00:00:00 2001 From: Elaine Zhang Date: Tue, 21 Feb 2017 16:50:51 +0800 Subject: [PATCH] clk: rockchip: add pll_wait_lock for pll_enable if pll is power down,when power up pll need wait pll lock. Change-Id: I2e795a682a0c9712b41e00ddf054065dde4a5c7c Signed-off-by: Elaine Zhang --- drivers/clk/rockchip/clk-pll.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/clk/rockchip/clk-pll.c b/drivers/clk/rockchip/clk-pll.c index 6188a6cc13d2..2643341ae869 100644 --- a/drivers/clk/rockchip/clk-pll.c +++ b/drivers/clk/rockchip/clk-pll.c @@ -475,6 +475,7 @@ static int rockchip_rk3036_pll_enable(struct clk_hw *hw) writel(HIWORD_UPDATE(0, RK3036_PLLCON1_PWRDOWN, 0), pll->reg_base + RK3036_PLLCON(1)); + rockchip_pll_wait_lock(pll); return 0; } @@ -720,6 +721,7 @@ static int rockchip_rk3066_pll_enable(struct clk_hw *hw) writel(HIWORD_UPDATE(0, RK3066_PLLCON3_PWRDOWN, 0), pll->reg_base + RK3066_PLLCON(3)); + rockchip_pll_wait_lock(pll); return 0; } @@ -1132,6 +1134,7 @@ static int rockchip_rk3399_pll_enable(struct clk_hw *hw) writel(HIWORD_UPDATE(0, RK3399_PLLCON3_PWRDOWN, 0), pll->reg_base + RK3399_PLLCON(3)); + rockchip_rk3399_pll_wait_lock(pll); return 0; } -- 2.34.1