From bb4f7fa1b3a9071b8ba04896dee914f3a5f28d99 Mon Sep 17 00:00:00 2001
From: XiaoDong Huang <derrick.huang@rock-chips.com>
Date: Fri, 5 May 2017 09:14:58 +0800
Subject: [PATCH] arm64: dts: rk3368: add rockchip-suspend node

Change-Id: I68f8068c795e87ffa3cbea4b23ba5df56a70218d
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3368.dtsi      | 17 +++++++++++++++++
 include/dt-bindings/suspend/rockchip-rk3368.h | 12 ++++++++----
 2 files changed, 25 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index 99803adb4ec6..c4ca7a6c703a 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -47,6 +47,7 @@
 #include <dt-bindings/pinctrl/rockchip.h>
 #include <dt-bindings/power/rk3368-power.h>
 #include <dt-bindings/soc/rockchip,boot-mode.h>
+#include <dt-bindings/suspend/rockchip-rk3368.h>
 #include <dt-bindings/thermal/thermal.h>
 #include <dt-bindings/display/mipi_dsi.h>
 #include <dt-bindings/display/drm_mipi_dsi.h>
@@ -2172,4 +2173,20 @@
 			};
 		};
 	};
+
+	rockchip_suspend: rockchip-suspend {
+		compatible = "rockchip,pm-rk3368";
+		status = "disabled";
+		rockchip,sleep-debug-en = <0>;
+		rockchip,sleep-mode-config = <
+			(0
+			| RKPM_SLP_ARMOFF_LOGPD
+			| RKPM_SLP_PMU_PLLS_PWRDN
+			| RKPM_SLP_PMU_PMUALIVE_32K
+			| RKPM_SLP_SFT_PLLS_DEEP
+			| RKPM_SLP_PMU_DIS_OSC
+			| RKPM_SLP_SFT_PD_NBSCUS
+			)
+		>;
+	};
 };
diff --git a/include/dt-bindings/suspend/rockchip-rk3368.h b/include/dt-bindings/suspend/rockchip-rk3368.h
index 372ca26fec0d..e8d4f5e7c702 100644
--- a/include/dt-bindings/suspend/rockchip-rk3368.h
+++ b/include/dt-bindings/suspend/rockchip-rk3368.h
@@ -18,15 +18,19 @@
 #define __DT_BINDINGS_ROCKCHIP_PM_H__
 /******************************bits ops************************************/
 
-#define RKPM_SLP_WFI					BIT(0)
-#define RKPM_SLP_ARMPD				BIT(1)
-#define RKPM_SLP_ARMOFF				BIT(2)
+#ifndef BIT
+#define BIT(nr)				(1 << (nr))
+#endif
+
+#define RKPM_SLP_WFI			BIT(0)
+#define RKPM_SLP_ARMPD			BIT(1)
+#define RKPM_SLP_ARMOFF			BIT(2)
 #define RKPM_SLP_ARMOFF_LOGPD		BIT(3)
 #define RKPM_SLP_ARMOFF_LOGOFF		BIT(4)
 #define RKPM_RUNNING_ARMMODE		BIT(5)
 
 /* func ctrl by pmu auto ctr */
-#define RKPM_SLP_PMU_PLLS_PWRDN	BIT(8) /* all plls except ddr's pll*/
+#define RKPM_SLP_PMU_PLLS_PWRDN		BIT(8) /* all plls except ddr's pll*/
 #define RKPM_SLP_PMU_PMUALIVE_32K	BIT(9)
 #define RKPM_SLP_PMU_DIS_OSC		BIT(10)
 
-- 
2.34.1