From be560a3fb7f5d1901583d84e22b10aadb502b4af Mon Sep 17 00:00:00 2001 From: Rafael Espindola Date: Fri, 28 Mar 2014 18:50:26 +0000 Subject: [PATCH] Parse .gpdword and convert another llc -filetype=obj test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205028 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 23 +++++- test/MC/Mips/do_switch3.s | 8 +- test/MC/Mips/elf-gprel-32-64.ll | 40 ---------- test/MC/Mips/elf-gprel-32-64.s | 83 +++++++++++++++++++++ 4 files changed, 109 insertions(+), 45 deletions(-) delete mode 100644 test/MC/Mips/elf-gprel-32-64.ll create mode 100644 test/MC/Mips/elf-gprel-32-64.s diff --git a/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/lib/Target/Mips/AsmParser/MipsAsmParser.cpp index 1433b4319c1..9ea2522b966 100644 --- a/lib/Target/Mips/AsmParser/MipsAsmParser.cpp +++ b/lib/Target/Mips/AsmParser/MipsAsmParser.cpp @@ -212,6 +212,7 @@ class MipsAsmParser : public MCTargetAsmParser { bool parseDataDirective(unsigned Size, SMLoc L); bool parseDirectiveGpWord(); + bool parseDirectiveGpdWord(); MCSymbolRefExpr::VariantKind getVariantKind(StringRef Symbol); @@ -2715,6 +2716,22 @@ bool MipsAsmParser::parseDirectiveGpWord() { return false; } +/// parseDirectiveGpdWord +/// ::= .gpdword local_sym +bool MipsAsmParser::parseDirectiveGpdWord() { + const MCExpr *Value; + // EmitGPRel64Value requires an expression, so we are using base class + // method to evaluate the expression. + if (getParser().parseExpression(Value)) + return true; + getParser().getStreamer().EmitGPRel64Value(Value); + + if (getLexer().isNot(AsmToken::EndOfStatement)) + return Error(getLexer().getLoc(), "unexpected token in directive"); + Parser.Lex(); // Eat EndOfStatement token. + return false; +} + bool MipsAsmParser::parseDirectiveOption() { // Get the option token. AsmToken Tok = Parser.getTok(); @@ -2798,11 +2815,15 @@ bool MipsAsmParser::ParseDirective(AsmToken DirectiveID) { } if (IDVal == ".gpword") { - // Ignore this directive for now. parseDirectiveGpWord(); return false; } + if (IDVal == ".gpdword") { + parseDirectiveGpdWord(); + return false; + } + if (IDVal == ".word") { parseDataDirective(4, DirectiveID.getLoc()); return false; diff --git a/test/MC/Mips/do_switch3.s b/test/MC/Mips/do_switch3.s index 5fbe705d07e..02ad0871463 100644 --- a/test/MC/Mips/do_switch3.s +++ b/test/MC/Mips/do_switch3.s @@ -73,10 +73,10 @@ $tmp0: .section .rodata,"a",@progbits .align 3 $JTI0_0: -// .gpdword ($BB0_3) -// .gpdword ($BB0_4) -// .gpdword ($BB0_5) -// .gpdword ($BB0_6) + .gpdword ($BB0_3) + .gpdword ($BB0_4) + .gpdword ($BB0_5) + .gpdword ($BB0_6) .text diff --git a/test/MC/Mips/elf-gprel-32-64.ll b/test/MC/Mips/elf-gprel-32-64.ll deleted file mode 100644 index 4057eb823a5..00000000000 --- a/test/MC/Mips/elf-gprel-32-64.ll +++ /dev/null @@ -1,40 +0,0 @@ -; RUN: llc -filetype=obj -march=mips64el -mcpu=mips64 %s -o - \ -; RUN: | llvm-readobj -r \ -; RUN: | FileCheck %s - -define i32 @test(i32 %c) nounwind { -entry: - switch i32 %c, label %sw.default [ - i32 0, label %sw.bb - i32 1, label %sw.bb2 - i32 2, label %sw.bb5 - i32 3, label %sw.bb8 - ] - -sw.bb: - br label %return -sw.bb2: - br label %return -sw.bb5: - br label %return -sw.bb8: - br label %return -sw.default: - br label %return - -return: - %retval.0 = phi i32 [ -1, %sw.default ], [ 7, %sw.bb8 ], [ 2, %sw.bb5 ], [ 3, %sw.bb2 ], [ 1, %sw.bb ] - ret i32 %retval.0 -} - -; Check that the appropriate relocations were created. - -; R_MIPS_GPREL32/R_MIPS_64/R_MIPS_NONE -; CHECK: Relocations [ -; CHECK: Section ({{[a-z0-9]+}}) .rela.rodata { -; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_MIPS_GPREL32/R_MIPS_64/R_MIPS_NONE -; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_MIPS_GPREL32/R_MIPS_64/R_MIPS_NONE -; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_MIPS_GPREL32/R_MIPS_64/R_MIPS_NONE -; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_MIPS_GPREL32/R_MIPS_64/R_MIPS_NONE -; CHECK-NEXT: } -; CHECK-NEXT: ] diff --git a/test/MC/Mips/elf-gprel-32-64.s b/test/MC/Mips/elf-gprel-32-64.s new file mode 100644 index 00000000000..ae75197a4fc --- /dev/null +++ b/test/MC/Mips/elf-gprel-32-64.s @@ -0,0 +1,83 @@ +// RUN: llvm-mc -filetype=obj -triple=mips64el-pc-linux -mcpu=mips64 %s -o - \ +// RUN: | llvm-readobj -r \ +// RUN: | FileCheck %s + +// Check that the appropriate relocations were created. + +// R_MIPS_GPREL32/R_MIPS_64/R_MIPS_NONE +// CHECK: Relocations [ +// CHECK: Section ({{[a-z0-9]+}}) .rela.rodata { +// CHECK-NEXT: 0x{{[0-9,A-F]+}} R_MIPS_GPREL32/R_MIPS_64/R_MIPS_NONE +// CHECK-NEXT: 0x{{[0-9,A-F]+}} R_MIPS_GPREL32/R_MIPS_64/R_MIPS_NONE +// CHECK-NEXT: 0x{{[0-9,A-F]+}} R_MIPS_GPREL32/R_MIPS_64/R_MIPS_NONE +// CHECK-NEXT: 0x{{[0-9,A-F]+}} R_MIPS_GPREL32/R_MIPS_64/R_MIPS_NONE +// CHECK-NEXT: } +// CHECK-NEXT: ] + + .text + .abicalls + .section .mdebug.abi64,"",@progbits + .file "/home/espindola/llvm/llvm/test/MC/Mips/elf-gprel-32-64.ll" + .text + .globl test + .align 3 + .type test,@function + .set nomips16 + .ent test +test: # @test + .frame $sp,0,$ra + .mask 0x00000000,0 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + .set noat +# BB#0: # %entry + lui $1, %hi(%neg(%gp_rel(test))) + daddu $2, $1, $25 + sltiu $1, $4, 4 + dsll $3, $4, 32 + bnez $1, $BB0_2 + nop +$BB0_1: # %sw.default + b $BB0_3 + addiu $2, $zero, -1 +$BB0_2: # %entry + daddiu $1, $2, %lo(%neg(%gp_rel(test))) + dsrl $3, $3, 32 + daddiu $4, $zero, 8 + dmult $3, $4 + mflo $3 + ld $4, %got_page($JTI0_0)($1) + daddu $3, $3, $4 + ld $3, %got_ofst($JTI0_0)($3) + daddu $1, $3, $1 + jr $1 + addiu $2, $zero, 1 +$BB0_3: # %return + jr $ra + nop +$BB0_4: # %sw.bb2 + jr $ra + addiu $2, $zero, 3 +$BB0_5: # %sw.bb5 + jr $ra + addiu $2, $zero, 2 +$BB0_6: # %sw.bb8 + jr $ra + addiu $2, $zero, 7 + .set at + .set macro + .set reorder + .end test +$tmp0: + .size test, ($tmp0)-test + .section .rodata,"a",@progbits + .align 3 +$JTI0_0: + .gpdword ($BB0_3) + .gpdword ($BB0_4) + .gpdword ($BB0_5) + .gpdword ($BB0_6) + + + .text -- 2.34.1