From beef941327741e27ca042f5362d78190cb76c9a8 Mon Sep 17 00:00:00 2001 From: hcy Date: Fri, 23 Aug 2013 11:12:48 +0800 Subject: [PATCH] fix 2 CS bug --- arch/arm/mach-rk30/ddr.c | 21 +++++++++++++++------ 1 file changed, 15 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-rk30/ddr.c b/arch/arm/mach-rk30/ddr.c index c03d15043b7a..c3496c7eb053 100755 --- a/arch/arm/mach-rk30/ddr.c +++ b/arch/arm/mach-rk30/ddr.c @@ -1389,7 +1389,7 @@ void __sramlocalfunc ddr_send_command(uint32 rank, uint32 cmd, uint32 arg) //!0 DTTʧ°Ü uint32_t __sramlocalfunc ddr_data_training(void) { - uint32 value,cs; + uint32 value,cs,i,byte=2; // disable auto refresh value = pDDR_Reg->TREFI; @@ -1403,16 +1403,25 @@ uint32_t __sramlocalfunc ddr_data_training(void) // clear DTDONE status pPHY_Reg->PIR |= CLRSR; cs = ((pPHY_Reg->PGCR>>18) & 0xF); + pPHY_Reg->PGCR = (pPHY_Reg->PGCR & (~(0xF<<18))) | (1<<18); //use cs0 dtt // trigger DTT pPHY_Reg->PIR |= INIT | QSTRN | LOCKBYP | ZCALBYP | CLRSR | ICPC; dsb(); // wait echo byte DTDONE - while((pPHY_Reg->DATX8[0].DXGSR[0] & cs) != cs); - while((pPHY_Reg->DATX8[1].DXGSR[0] & cs) != cs); + while((pPHY_Reg->DATX8[0].DXGSR[0] & 1) != 1); + while((pPHY_Reg->DATX8[1].DXGSR[0] & 1) != 1); if(!(pDDR_Reg->PPCFG & 1)) { - while((pPHY_Reg->DATX8[2].DXGSR[0] & cs) != cs); - while((pPHY_Reg->DATX8[3].DXGSR[0] & cs) != cs); + while((pPHY_Reg->DATX8[2].DXGSR[0] & 1) != 1); + while((pPHY_Reg->DATX8[3].DXGSR[0] & 1) != 1); + byte=4; + } + pPHY_Reg->PGCR = (pPHY_Reg->PGCR & (~(0xF<<18))) | (cs<<18); //restore cs + for(i=0;iDATX8[i].DXDQSTR = (pPHY_Reg->DATX8[i].DXDQSTR & (~((0x7<<3)|(0x3<<14)))) + | ((pPHY_Reg->DATX8[i].DXDQSTR & 0x7)<<3) + | (((pPHY_Reg->DATX8[i].DXDQSTR>>12) & 0x3)<<14); } // send some auto refresh to complement the lost while DTT£¬//²âµ½1¸öCSµÄDTT×ʱ¼äÊÇ10.7us¡£×î¶à²¹2´ÎˢРif(cs > 1) @@ -3555,7 +3564,7 @@ int ddr_init(uint32_t dram_speed_bin, uint32_t freq) uint32_t die=1; uint32_t gsr,dqstr; - ddr_print("version 1.00 201300810 \n"); + ddr_print("version 1.00 201300814 \n"); mem_type = pPHY_Reg->DCR.b.DDRMD; ddr_speed_bin = dram_speed_bin; -- 2.34.1