From c15a73336a150879e55d7e3cf46effce0de0d9a3 Mon Sep 17 00:00:00 2001 From: xxx Date: Thu, 26 Jun 2014 18:19:48 +0800 Subject: [PATCH] add ft tst func --- arch/arm/boot/dts/rk3288-ft.dts | 54 + arch/arm/boot/dts/rk3288.dtsi | 2 +- arch/arm/configs/rockchip_ft_defconfig | 76 ++ arch/arm/mach-rockchip/Kconfig | 5 + arch/arm/mach-rockchip/Makefile | 1 + .../arm/mach-rockchip/rk_pm_tests/ft/Makefile | 5 + .../mach-rockchip/rk_pm_tests/ft/cpu_test.h | 228 ++++ .../mach-rockchip/rk_pm_tests/ft/fft/Makefile | 2 + .../rk_pm_tests/ft/fft/fft_fixed_point.c | 401 ++++++ .../rk_pm_tests/ft/fft/fft_fixed_point.h | 25 + .../mach-rockchip/rk_pm_tests/ft/fft/test.c | 353 ++++++ .../mach-rockchip/rk_pm_tests/ft/ft_cpu_tst.S | 156 +++ .../rk_pm_tests/ft/ft_cpu_tst1.S | 44 + .../mach-rockchip/rk_pm_tests/ft/ft_test.c | 1073 +++++++++++++++++ .../mach-rockchip/rk_pm_tests/ft/rk_ft_io.c | 176 +++ .../mach-rockchip/rk_pm_tests/ft/test_mem.c | 447 +++++++ 16 files changed, 3047 insertions(+), 1 deletion(-) create mode 100755 arch/arm/boot/dts/rk3288-ft.dts create mode 100644 arch/arm/configs/rockchip_ft_defconfig create mode 100755 arch/arm/mach-rockchip/rk_pm_tests/ft/Makefile create mode 100755 arch/arm/mach-rockchip/rk_pm_tests/ft/cpu_test.h create mode 100755 arch/arm/mach-rockchip/rk_pm_tests/ft/fft/Makefile create mode 100755 arch/arm/mach-rockchip/rk_pm_tests/ft/fft/fft_fixed_point.c create mode 100755 arch/arm/mach-rockchip/rk_pm_tests/ft/fft/fft_fixed_point.h create mode 100644 arch/arm/mach-rockchip/rk_pm_tests/ft/fft/test.c create mode 100755 arch/arm/mach-rockchip/rk_pm_tests/ft/ft_cpu_tst.S create mode 100755 arch/arm/mach-rockchip/rk_pm_tests/ft/ft_cpu_tst1.S create mode 100644 arch/arm/mach-rockchip/rk_pm_tests/ft/ft_test.c create mode 100755 arch/arm/mach-rockchip/rk_pm_tests/ft/rk_ft_io.c create mode 100755 arch/arm/mach-rockchip/rk_pm_tests/ft/test_mem.c diff --git a/arch/arm/boot/dts/rk3288-ft.dts b/arch/arm/boot/dts/rk3288-ft.dts new file mode 100755 index 000000000000..2aa85ad24f4a --- /dev/null +++ b/arch/arm/boot/dts/rk3288-ft.dts @@ -0,0 +1,54 @@ +/dts-v1/; + +#include "rk3288.dtsi" + +/ { + memory { + device_type = "memory"; + reg = <0x00000000 0x40000000>; + }; + + chosen { + bootargs = "console=ttyFIQ0 rockchip_jtag"; + }; + + fiq-debugger { + status = "okay"; + }; + + rockchip_ft_test { + // rockchip,arm_rate =<408000000 504000000 600000000 792000000>; + // firs rate is setting in rockchip_clocks_init,so it is set 0xfffffffff + rockchip,arm_rate =<0xffffffff (1728000000*1) (1752000000*1) (1800000000*1)>; + rockchip,l1_tst_cnt=<(5*10*2-10) (5*10*2-10) (5*10*2-10) (80-10+0) >; + rockchip,l2_cpy_cnt= <5 5 4 (4+0)>; + rockchip,ftt_tst_cnt= <1 1 1 (0+0)>; + rockchip,pi_tst_cnt= <12 12 10 (8+0)>; + rockchip,stp_task_num= <300 250 250 (80+0)>; + rockchip,ft_end_cnt= <0x23>; + }; +}; + + &rockchip_clocks_init { + rockchip,clocks-init-rate = + <&clk_core 1704000000>, <&clk_gpll 297000000>, + /*<&clk_cpll 47000000>,*/ <&clk_npll 1250000000>, + <&aclk_bus_src 300000000>, <&aclk_bus 300000000>, + <&hclk_bus 150000000>, <&pclk_bus 75000000>, + <&clk_crypto 150000000>, <&aclk_peri 300000000>, + <&hclk_peri 150000000>, <&pclk_peri 75000000>, + <&clk_gpu 200000000>, <&aclk_vio0 300000000>, + <&aclk_vio1 300000000>, <&hclk_vio 75000000>, + <&pclk_pd_alive 100000000>, <&pclk_pd_pmu 100000000>, + <&aclk_hevc 400000000>, <&hclk_hevc 200000000>, + <&clk_hevc_cabac 300000000>, <&clk_hevc_core 300000000>, + <&aclk_rga 300000000>, <&clk_rga 300000000>, + <&clk_vepu 300000000>, <&clk_vdpu 300000000>, + <&clk_edp 200000000>, <&clk_isp 200000000>, + <&clk_isp_jpe 400000000>, <&clk_tsp 80000000>, + <&clk_tspout 80000000>, <&clk_mac 125000000>; +}; + + + + diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 3bc9fde70be8..907348441034 100755 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -471,7 +471,7 @@ status = "disabled"; }; - clocks-init{ + rockchip_clocks_init: clocks-init{ compatible = "rockchip,clocks-init"; rockchip,clocks-init-parent = <&clk_core &clk_apll>, <&aclk_bus_src &clk_gpll>, diff --git a/arch/arm/configs/rockchip_ft_defconfig b/arch/arm/configs/rockchip_ft_defconfig new file mode 100644 index 000000000000..7931ecf64121 --- /dev/null +++ b/arch/arm/configs/rockchip_ft_defconfig @@ -0,0 +1,76 @@ +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_KERNEL_LZO=y +CONFIG_LOG_BUF_SHIFT=12 +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +# CONFIG_UID16 is not set +# CONFIG_BASE_FULL is not set +# CONFIG_FUTEX is not set +# CONFIG_EPOLL is not set +# CONFIG_SIGNALFD is not set +# CONFIG_TIMERFD is not set +# CONFIG_EVENTFD is not set +# CONFIG_SHMEM is not set +# CONFIG_AIO is not set +CONFIG_EMBEDDED=y +# CONFIG_VM_EVENT_COUNTERS is not set +# CONFIG_BLOCK is not set +CONFIG_ARCH_ROCKCHIP=y +# CONFIG_RK_LAST_LOG is not set +# CONFIG_RK_CONSOLE_THREAD is not set +# CONFIG_DVFS is not set +# CONFIG_RK_VCODEC is not set +CONFIG_RK_FT_TEST=y +# CONFIG_ARM_THUMB is not set +# CONFIG_SWP_EMULATE is not set +# CONFIG_KUSER_HELPERS is not set +CONFIG_FIQ_DEBUGGER=y +CONFIG_FIQ_DEBUGGER_NO_SLEEP=y +CONFIG_FIQ_DEBUGGER_CONSOLE=y +CONFIG_FIQ_DEBUGGER_CONSOLE_DEFAULT_ENABLE=y +CONFIG_SMP=y +CONFIG_PREEMPT=y +CONFIG_AEABI=y +# CONFIG_OABI_COMPAT is not set +CONFIG_HIGHMEM=y +# CONFIG_COMPACTION is not set +CONFIG_DEFAULT_MMAP_MIN_ADDR=32768 +# CONFIG_CROSS_MEMORY_ATTACH is not set +# CONFIG_ATAGS is not set +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_ARM_APPENDED_DTB=y +CONFIG_CMDLINE="console=ttyFIQ0" +CONFIG_CPU_IDLE=y +CONFIG_VFP=y +CONFIG_NEON=y +# CONFIG_BINFMT_ELF is not set +# CONFIG_BINFMT_SCRIPT is not set +# CONFIG_COREDUMP is not set +# CONFIG_SUSPEND is not set +# CONFIG_FW_LOADER is not set +CONFIG_SRAM=y +# CONFIG_5V_EN is not set +# CONFIG_INPUT is not set +# CONFIG_SERIO is not set +# CONFIG_VT is not set +# CONFIG_UNIX98_PTYS is not set +# CONFIG_LEGACY_PTYS is not set +# CONFIG_DEVMEM is not set +# CONFIG_DEVKMEM is not set +# CONFIG_HW_RANDOM is not set +# CONFIG_HWMON is not set +# CONFIG_IEP is not set +# CONFIG_USB_SUPPORT is not set +# CONFIG_IOMMU_SUPPORT is not set +# CONFIG_FILE_LOCKING is not set +# CONFIG_DNOTIFY is not set +# CONFIG_INOTIFY_USER is not set +# CONFIG_PROC_FS is not set +# CONFIG_SYSFS is not set +# CONFIG_MISC_FILESYSTEMS is not set +CONFIG_MAGIC_SYSRQ=y +# CONFIG_DEBUG_PREEMPT is not set +# CONFIG_STACKTRACE is not set +# CONFIG_RCU_CPU_STALL_VERBOSE is not set +# CONFIG_FTRACE is not set +# CONFIG_CRC32 is not set diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index eecbf138a36e..827f48ccd8f6 100755 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -80,4 +80,9 @@ config RK_VCODEC config RK_PL330_DMA_TEST bool "pl330 DMA memcpy test" + +config RK_FT_TEST + bool "ft test" + select LZO_COMPRESS + select LZO_DECOMPRESS endif diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index 65060cd8a996..367a0aea6d76 100755 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -17,3 +17,4 @@ obj-$(CONFIG_RK_PL330_DMA_TEST) += dma_memcpy_test.o obj-$(CONFIG_BLOCK_RKNAND) += rknandbase.o obj-$(CONFIG_DDR_TEST) += ddr_test.o obj-$(CONFIG_RK_PM_TESTS) += rk_pm_tests/ +obj-$(CONFIG_RK_FT_TEST) += rk_pm_tests/ft/ diff --git a/arch/arm/mach-rockchip/rk_pm_tests/ft/Makefile b/arch/arm/mach-rockchip/rk_pm_tests/ft/Makefile new file mode 100755 index 000000000000..215bb0f4f5cf --- /dev/null +++ b/arch/arm/mach-rockchip/rk_pm_tests/ft/Makefile @@ -0,0 +1,5 @@ +obj-y += ft_cpu_tst.o +obj-y += ft_cpu_tst1.o +obj-y += ft_test.o +obj-y += test_mem.o +obj-y += fft/ diff --git a/arch/arm/mach-rockchip/rk_pm_tests/ft/cpu_test.h b/arch/arm/mach-rockchip/rk_pm_tests/ft/cpu_test.h new file mode 100755 index 000000000000..edae7e6f605a --- /dev/null +++ b/arch/arm/mach-rockchip/rk_pm_tests/ft/cpu_test.h @@ -0,0 +1,228 @@ + +#include +#include +//#include +//#include + +.text + + + //_off 12 -20 + .macro test_cpus_pc_jump , _base,_reg, _off + + ldr \_reg,[pc] + str \_reg,[\_base] + mov \_reg,pc + str \_reg,[\_base,#4] + add \_reg,\_off //pc offset + str \_reg,[\_base,#8]// offset start + ldr pc, [\_base,#8] + ldr \_reg,[pc] + ldr \_reg,[pc] + .endm + + + .macro cpus_tst_get_opcode, _reg0 + lsl \_reg0,\_reg0,#4 + lsr \_reg0,\_reg0,#24 + .endm + + + .macro cpus_tst_code_lsl , _reg0 + ldr \_reg0,[pc] + mov \_reg0,\_reg0 + lsl \_reg0,\_reg0,#4 + lsr \_reg0,\_reg0,#24 + cmp \_reg0,#0x1a + bne l1_test_error + .endm + + .macro cpus_tst_code_lsr , _reg0 + ldr \_reg0,[pc] + lsl \_reg0,\_reg0,#4 + lsr \_reg0,\_reg0,#24 + cmp \_reg0,#0x1a + bne l1_test_error + .endm + + + .macro cpus_tst_code_cmp, _reg0 + ldr \_reg0,[pc,#4] + lsl \_reg0,\_reg0,#4 + lsr \_reg0,\_reg0,#24 + cmp \_reg0,#0x35 + bne l1_test_error + .endm + + + + .macro cpus_tst_code_sub, _reg0,_reg1 + mov \_reg0,pc + sub \_reg0,#4 + ldr \_reg1,[\_reg0] + lsl \_reg1,\_reg1,#4 + lsr \_reg1,\_reg1,#24 + cmp \_reg1,#0x24 + bne l1_test_error + .endm + + + .macro cpus_tst_code_ldr, _reg0,_reg1 + mov \_reg0,pc + sub \_reg0,#0 + ldr \_reg1,[\_reg0] + lsl \_reg1,\_reg1,#4 + lsr \_reg1,\_reg1,#24 + cmp \_reg1,#0x59 + bne l1_test_error + .endm + + .macro cpus_tst_code_bne, _reg0,_reg1 + ldr \_reg0,[pc,#12] + + lsr \_reg1,\_reg0,#28 + lsl \_reg0,\_reg0,#4 + lsr \_reg0,\_reg0,#24 + + cmp \_reg1,#0x1 // + bne l1_test_error + cmp \_reg0,#0xa0 + bne l1_test_error + + .endm + + + +.macro test_cpus_l1_code_base + //r4 base + mov r5,#16 + test_cpus_pc_jump r4,r3,r5 + + //add r4,#8 + mov r6,r4 + mov r8,#20 + test_cpus_pc_jump r6,r7,r8 + + //add r4,#8 + + cpus_tst_code_lsl r5 + + cpus_tst_code_lsr r7 + + cpus_tst_code_cmp r9 + + + cpus_tst_code_sub r11,r10, + + cpus_tst_code_ldr r12,r8 + + cpus_tst_code_bne r6,r7 + +.endm + + +.macro test_cpus_l1_code_base_ + + + mov r4,r4 + mov r6,r6 + mov r7,r7 + mov r8,r8 + mov r4,r4 + mov r6,r6 + mov r7,r7 + mov r8,r8 + mov r4,r4 + mov r6,r6 + + mov r4,r4 + mov r6,r6 + mov r7,r7 + mov r8,r8 + mov r4,r4 + mov r6,r6 + mov r7,r7 + mov r8,r8 + mov r4,r4 + mov r6,r6 + + + + mov r7,r7 + mov r8,r8 + mov r4,r4 + mov r6,r6 + mov r7,r7 + + + + + + +.endm + + +.macro test_cpus_l1_loop_100 + +.endm + +.macro test_cpus_l1_loop_500 +#if 1 + test_cpus_l1_code_base + test_cpus_l1_code_base +#else + + test_cpus_l1_code_base_ + test_cpus_l1_code_base_ + + test_cpus_l1_code_base_ + test_cpus_l1_code_base_ + test_cpus_l1_code_base_ + + test_cpus_l1_code_base_ + +#endif +.endm + + +.macro test_cpus_l1_loop_1_k + test_cpus_l1_loop_500 + test_cpus_l1_loop_500 +.endm + + +.macro test_cpus_l1_loop_4_k + test_cpus_l1_loop_1_k + test_cpus_l1_loop_1_k + test_cpus_l1_loop_1_k + test_cpus_l1_loop_1_k + test_cpus_l1_loop_500 +.endm + + + +.macro test_cpus_l1_loop_10_k + test_cpus_l1_loop_4_k + test_cpus_l1_loop_4_k + test_cpus_l1_loop_4_k + test_cpus_l1_loop_4_k +.endm + + +.macro test_cpus_l1_loop_50_k + test_cpus_l1_loop_10_k + test_cpus_l1_loop_10_k + test_cpus_l1_loop_10_k + test_cpus_l1_loop_10_k + test_cpus_l1_loop_10_k +.endm + +.macro test_cpus_l1_loop_200_k + test_cpus_l1_loop_50_k + test_cpus_l1_loop_50_k + test_cpus_l1_loop_50_k + test_cpus_l1_loop_50_k + +.endm + + diff --git a/arch/arm/mach-rockchip/rk_pm_tests/ft/fft/Makefile b/arch/arm/mach-rockchip/rk_pm_tests/ft/fft/Makefile new file mode 100755 index 000000000000..48fc2f11879a --- /dev/null +++ b/arch/arm/mach-rockchip/rk_pm_tests/ft/fft/Makefile @@ -0,0 +1,2 @@ +obj-y += fft_fixed_point.o +obj-y += test.o diff --git a/arch/arm/mach-rockchip/rk_pm_tests/ft/fft/fft_fixed_point.c b/arch/arm/mach-rockchip/rk_pm_tests/ft/fft/fft_fixed_point.c new file mode 100755 index 000000000000..9308226be8c2 --- /dev/null +++ b/arch/arm/mach-rockchip/rk_pm_tests/ft/fft/fft_fixed_point.c @@ -0,0 +1,401 @@ +#include "fft_fixed_point.h" +#if 0 +#include +#include +#else + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#define free(ptr) kfree((ptr)) +//typedef unsigned char uchar; + +#define malloc(size) kmalloc((size), GFP_ATOMIC) + +#define printf(fmt, arg...) \ + printk(KERN_EMERG fmt, ##arg) + +#endif + + +/***********************************************²éÕÒ±í*************************************************************/ + +//È«¾Ö±äÁ¿,2µÄÕûÊý´ÎÃݱí +int Pow2_table[20] = {1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768,65536,131072,262144,524288}; + +//¶ÔÉϱí½øÐж¨µã»¯ºóµÄsinº¯Êý²éÕÒ±í£¬¼´½«ÉϱíÖÐÿ¸öÊý³ËÉÏ 2^8 = 256 +int sin_table_INT_128[]={ + 0, 13, 25, 38, 50, 62, 74, 86, + 98, 109, 121, 132, 142, 152, 162, 172, + 181, 190, 198, 206, 213, 220, 226, 231, + 237, 241, 245, 248, 251, 253, 255, 256, + 256, 256, 255, 253, 251, 248, 245, 241, + 237, 231, 226, 220, 213, 206, 198, 190, + 181, 172, 162, 152, 142, 132, 121, 109, + 98, 86, 74, 62, 50, 38, 25, 13 + +}; +//FFTÖеãÊýΪ128µÄcosº¯Êý¶¨µã»¯ºóµÄ²éÕÒ±í£¬ +int cos_table_INT_128[]={ + 256, 256, 255, 253, 251, 248, 245, 241, + 237, 231, 226, 220, 213, 206, 198, 190, + 181, 172, 162, 152, 142, 132, 121, 109, + 98, 86, 74, 62, 50, 38, 25, 13, + 0, -13, -25, -38, -50, -62, -74, -86, + -98, -109, -121, -132, -142, -152, -162, -172, + -181, -190, -198, -206, -213, -220, -226, -231, + -237, -241, -245, -248, -251, -253, -255, -256 +}; + +//FFTÖÐÊäÈëÐòÁÐÖØÐÂÅÅÐòºóµÄÐòÁÐ ×¢Òâ:Ö»ÊÊÓÃÓÚµãÊýΪ128 +int reverse_matrix[]={ + 0, 64, 32, 96, 16, 80, 48, 112, 8, 72, 40, 104, 24, 88, 56, 120, + 4, 68, 36, 100, 20, 84, 52, 116, 12, 76, 44, 108, 28, 92, 60, 124, + 2, 66, 34, 98, 18, 82, 50, 114, 10, 74, 42, 106, 26, 90, 58, 122, + 6, 70, 38, 102, 22, 86, 54, 118, 14, 78, 46, 110, 30, 94, 62, 126, + 1, 65, 33, 97, 17, 81, 49, 113, 9, 73, 41, 105, 25, 89, 57, 121, + 5, 69, 37, 101, 21, 85, 53, 117, 13, 77, 45, 109, 29, 93, 61, 125, + 3, 67, 35, 99, 19, 83, 51, 115, 11, 75, 43, 107, 27, 91, 59, 123, + 7, 71, 39, 103, 23, 87, 55, 119, 15, 79, 47, 111, 31, 95, 63, 127 +}; + +/***********************************************²éÕÒ±í*************************************************************/ + + + +/*************************************************************************************** +ÒÔÏÂΪʵÏÖ¶þά¾ØÕóµÄFFT±ä»»µÄÏà¹Øº¯Êý,ÉèAΪMÐÐNÁУ¬ÔòM,N±ØÐëÊÇ£²µÄÃÝ´ÎÊý +Date: + 2012-05-07 +****************************************************************************************/ + +/************************************************************************* +Function: + reverse +Discription: + ÐòÁеÄÄæÐòÅÅÁÐ + ÓÉÓÚ x(n) ±»·´¸´µØ°´Æ桢ż·Ö×飬ËùÒÔÁ÷ͼÊäÈë¶ËµÄÅÅÁв»ÔÙÊÇ˳ÐòµÄ, + ÒÔÏÂÔòÊDZ£Ö¤Êä³ö¶ËÊÇ×ÔȻ˳Ðòʱ£¬ÊäÈë¶ËµÄ±äÖ·´¦Àí +Input Arguments: + len: ÐòÁеij¤¶È + M: ³¤¶È¶ÔÓ¦µÄ2µÄÖ¸Êý Èçlen = 8,M = 3 +Output Arguments: + b: ÊäÈë¶Ë±äÖ·´¦ÀíºóÊä³öµÄµ¹Î»Ðò +Author: + Wu Lijuan +Note: + N./A. +Date: + $ID: $ +**************************************************************************/ +void reverse(int len, int M,int *b) +{ + //×¢ÒâbÔÚÍâÃæ±ØÐë³õʼ»¯Îª0 + int i,j; + + //aµÄ³õʼ»¯,aÓÃÓÚ´æ·Å±äÖ·ºóÐòÁеĶþ½øÖÆÊý + char *a = (char *)malloc(sizeof(char)*M); // aÓÃÓÚ´æ·ÅMλ¶þ½øÖÆÊý + memset(a,0,sizeof(char)*M); + + for(i=1; i Pow2_table[i]) + { + i++; + } + y = i; + return y; +} +/************************************************************************* +Function: + fft_fixed_point +Discription: + 1D FFT±ä»» ²ÉÓö¨µã»¯¼ÆË㣬Ìá¸ßËÙ¶È +Input Arguments: + A: ÓÃÓÚFFT±ä»»µÄÐòÁÐ,ͬʱҲÊÇÊä³ö½á¹û + fft_nLen:¡¡ÐòÁг¤¶È + fft_M: ³¤¶È¶ÔÓ¦µÄÖ¸Êý eg, 8 = 2^3 +Output Arguments: + +Author: + Wu Lijuan +Note: + ¾ßÌåÔ­Àí²Î¿¼±¾Îļþ¼ÐÏÂPPT:¿ìËÙ¸µÀïÒ¶±ä»»£¨µûÐÎÔËË㣩P31 +Date: + 2013.06.25 +**************************************************************************/ +void fft_fixed_point(int fft_nLen, int fft_M, RK_complex_INT * A) +{ + int i; + int L,dist,p,t; + int temp1,temp2; + RK_complex_INT *pr1,*pr2; + //double temp = 2*PI/fft_nLen; + + int WN_Re,WN_Im; //WNµÄʵ²¿ºÍÐ鲿 + int X1_Re,X1_Im; //ÁÙʱ±äÁ¿µÄʵ²¿ºÍÐ鲿 + int X2_Re,X2_Im; + int WN_X2_Re; + int WN_X2_Im; + + for(L = 1; L <= fft_M; L++) //Íê³ÉM´ÎµûÐεĵü´ú¹ý³Ì + { + dist = Pow2_table[L-1]; //dist = pow(2,L-1); µûÐÎÔËËãÁ½½Úµã¼äµÄ¾àÀë + temp1 = Pow2_table[fft_M-L]; //temp1 = pow(2,fft_M-L); + temp2 = Pow2_table[L]; //temp2 = pow(2,L); + for(t=0; treal; //X1_Re = A[i].real; + X1_Im = pr1->image; //X1_Im = A[i].image; + X2_Re = pr2->real; //X2_Re = A[i+dist].real; + X2_Im = pr2->image; //X2_Im = A[i+dist].image; + + + //¼ÆËãWN * X2(k),ÊǸö¸´Êý + WN_X2_Re = ((long long)WN_Re * X2_Re - (long long)WN_Im * X2_Im) >> Q_INPUT; + WN_X2_Im = ((long long)WN_Im * X2_Re + (long long)WN_Re * X2_Im) >> Q_INPUT; + + //¼ÆËãX(k) = X1(k) + WN * X2(k); + pr1->real = X1_Re + WN_X2_Re; //A[i].real = X1_Re + WN_X2_Re; + pr1->image = X1_Im + WN_X2_Im; //A[i].image = X1_Im + WN_X2_Im; + + //¼ÆËãX(k) = X1(k) - WN * X2(k); + pr2->real = X1_Re - WN_X2_Re; //A[i+dist].real = X1_Re - WN_X2_Re; + pr2->image = X1_Im - WN_X2_Im; //A[i+dist].image = X1_Im - WN_X2_Im; + } + } + } +} + +/************************************************************************* +Function: + fft_2D_fixed_point +Discription: + 2ά FFT±ä»» +Input Arguments: + mLen,nLen ¾ØÕóµÄ¸ß¿í + M,N; ³¤¶È¶ÔÓ¦µÄ2µÄ¶ÔÊý M = log2(mlen), N = log2(nlen); + A_In:¡¡¡¡Òª½øÐÐÄæ±ä»»µÄ¾ØÕó,ͬʱҲÊÇÊä³ö½á¹û + flag: 0¡¡ÕýÏòFFT±ä»»£¬¡¡1 ÄæÏòFFT±ä»» +Output Arguments: + +Author: + Wu Lijuan +Note: + N./A. +Date: + 2013.06.25 +**************************************************************************/ +void fft_2D_fixed_point(int mLen,int nLen,int M,int N,RK_complex_INT *A_In,int flag) +{ + int i,j; + int len = mLen * nLen; + + //int *b = NULL; + int *b = reverse_matrix; //Ö±½Ó²éÄæÐò±í£¬Ìá¸ßЧÂÊ + RK_complex_INT *p; + //AÓÃÓÚ´¦Àí¾ØÕóÖÐÿÐеÄÊý¾Ý + RK_complex_INT * A; + + if (flag == DXT_INVERSE) + { + p = A_In; + + for(i=0; iimage) *= -1; //A_In[i].image = -A_In[i].image; + p++; + } + } + + + A = (RK_complex_INT *)malloc(sizeof(RK_complex_INT)*nLen); + + + //ÏȶԾØÕóµÄÿһÐÐ×öFFT±ä»» + for(i=0; ireal = pr2->real; + pr1->image = pr2->image; + pr1++; + } + + + fft_fixed_point(nLen,N,A); //½øÐÐIFFT±ä»»£¬±ä»»ºóµÄ½á¹ûÈÔ´æÓÚA + + if (flag == DXT_FORWARD) + { + pr1 = A; //ÖØÐÂÖÃλָÕë + pr2 = pr3; + + for(j=0; jreal = pr1->real; + pr2->image = pr1->image; + pr1++; + pr2++; + } + } + else + { + pr1 = A; //ÖØÐÂÖÃλָÕë + pr2 = pr3; + + for(j=0; jreal = pr1->real >> N; + pr2->image = pr1->image >>N; + pr1++; + pr2++; + } + } + + } + free(A); + //free(b); + + //AÓÃÓÚ´¦Àí¾ØÕóÖÐÿÁеÄÊý¾Ý + A = (RK_complex_INT *)malloc(sizeof(RK_complex_INT)*mLen); + + + //ÏȶԾØÕóµÄÿһÁÐ×öFFT±ä»» + for(i=0; ireal = pr2->real; + pr1->image = pr2->image; + pr1++; + } + + fft_fixed_point(mLen,M,A); //½øÐÐIFFT±ä»»£¬±ä»»ºóµÄ½á¹ûÈÔ´æÓÚA + + if (flag == DXT_FORWARD) + { + pr1 = A; //ÖØÐÂÖÃλָÕë + pr2 = pr3; + + for(j=0; jreal = pr1->real; + pr2->image = pr1->image; + pr1++; + pr2 += nLen; + } + } + else + { + pr1 = A; //ÖØÐÂÖÃλָÕë + pr2 = pr3; + + for(j=0; jreal = pr1->real >> M; + pr2->image = pr1->image >> M; + pr1++; + pr2 += nLen; + } + } + } + free(A); +} + + + + diff --git a/arch/arm/mach-rockchip/rk_pm_tests/ft/fft/fft_fixed_point.h b/arch/arm/mach-rockchip/rk_pm_tests/ft/fft/fft_fixed_point.h new file mode 100755 index 000000000000..e7fc32e49d3b --- /dev/null +++ b/arch/arm/mach-rockchip/rk_pm_tests/ft/fft/fft_fixed_point.h @@ -0,0 +1,25 @@ +#ifndef __FFT_FIXED_POINT_H_ +#define __FFT_FIXED_POINT_H_ + + +#define DXT_FORWARD 0 +#define DXT_INVERSE 1 + +#define Q_INPUT 8 + +typedef struct{ + int real; + int image; +}RK_complex_INT; + + +//2012-05-07 +//ÒÔÏÂÊÇfft±ä»»µÄÏà¹Øº¯Êý +//ÐòÁеÄÄæÐòÅÅÁÐ +void reverse(int len, int M,int *b); +int nexttopow2(int x); +void fft_fixed_point(int fft_nLen, int fft_M, RK_complex_INT * A); +void fft_2D_fixed_point(int mLen,int nLen,int M,int N,RK_complex_INT *A_In,int flag); + + +#endif \ No newline at end of file diff --git a/arch/arm/mach-rockchip/rk_pm_tests/ft/fft/test.c b/arch/arm/mach-rockchip/rk_pm_tests/ft/fft/test.c new file mode 100644 index 000000000000..fd4be65498b1 --- /dev/null +++ b/arch/arm/mach-rockchip/rk_pm_tests/ft/fft/test.c @@ -0,0 +1,353 @@ +#include "fft_fixed_point.h" +#if 0 +#include +#include +#else + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#define free(ptr) kfree((ptr)) +//typedef unsigned char uchar; + +#define malloc(size) kmalloc((size), GFP_ATOMIC) + +#define printf(fmt, arg...) \ + printk(KERN_EMERG fmt, ##arg) + +#endif + + +extern int Pow2_table[20]; +typedef unsigned char uchar; + +uchar image[16384] = { + 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176,63,46,35,31,32,30,30,30,34,30,19,17,23,33,36,36,32,25,23,19,19,20,23,25,25,25,26,23,22,16,23,27,30,35,36,35,33,32,36,34,36,37,27,25,24,17,15,16,16,13,12,11,11,11,15,16,16,18,19,16,17,20,14,10,9,8,8,9,11,16,16,13,14,21,17,25,26,21,20,20,21,27,27,8,10,7,6,9,9,9,11,10,13,14,12,7,5,7,14,19,19,18,18,19,20,23,22,16,15,61,92,55,32,27,28,29,30,32,31,32,33,31,32,32,31,29,25, + 133,64,54,38,30,31,30,29,27,29,29,25,18,19,25,31,33,31,26,24,21,20,21,21,22,24,23,23,23,23,19,22,26,27,31,32,32,31,29,29,29,30,34,29,27,27,20,17,18,21,17,16,15,15,15,19,19,19,19,19,18,18,19,20,15,16,16,15,16,16,15,17,17,18,20,21,23,25,23,24,24,26,31,20,14,14,12,14,16,15,15,16,16,18,18,17,14,12,13,16,22,21,23,22,21,20,22,19,20,22,67,74,38,42,26,26,28,29,28,28,30,31,31,30,30,28,28,27}; + + +int result[16384] = { +50175,38900,38903,39673,41726,41983,41725,41726,41721,41725,41462,41457,41209,40694,40695,40945,40447,40436,40447,40440,40445,40177,40440,40447,40440,40696,41723,42234,42493,42233,42492,42743,42495,42746,42748,42492,43008,43257,43264,43260,43006,43004,43521,43520,44033,44030,44032,44031,44031,44030,44290,44288,44289,44287,44290,44285,44291,44544,44805,44806,44801,45056,45061,45062,44799,44804,44805,44545,45055,44797,45057,45056,45061,45058,45064,45070,45058,45317,45315,45323,45055,45061,45056,45058,45055,45066,45059,45053,45062,45064,45059,44807,44801,44805,44803,44808,44799,44806,44801,44288,44287,44295,44288,44291,44288,44035,43772,43520,43519,43780,43517,43264,43007,43011,43007,42751,42752,42752,43006,42751,42747,42751,42745,42748,42748,43264,43516,43514, +50432,39157,38904,39678,41732,41982,41719,41721,41718,41726,41467,41466,41217,40702,40707,40957,40459,40446,40451,40440,40441,40686,40433,40438,40429,40682,41713,42225,42487,42225,42487,42738,42487,42736,42735,42477,42995,42989,43253,43250,43510,43505,43511,43512,44025,44021,44026,44025,44030,44051,44345,44359,44353,44339,44353,44349,44353,44604,44863,44863,44856,45109,44855,45111,44848,44851,44851,44592,45104,44844,45105,45098,45098,45098,45111,45122,45102,45361,45366,45375,45104,45110,45108,45109,45104,45113,45095,45095,45113,45121,45113,44825,44817,44822,44819,44825,44816,44822,44814,44299,44298,44305,44296,44300,44040,44045,43783,43787,43529,43792,43533,43283,43032,43040,43039,42785,42788,42787,43040,42786,42781,42785,42780,42782,42782,43040,42777,42777, +50437,39172,38916,40203,42007,41754,41496,41496,41491,41493,41480,41470,41226,40711,40970,40707,40473,40469,40481,40731,40736,40469,40733,40740,40733,40735,41763,42531,42534,42531,42535,42785,42791,42787,42791,42791,43308,43300,43306,43302,43303,43558,43819,43817,43820,44074,44074,44071,44073,44073,44338,44348,44351,44349,44352,44339,44335,44585,44851,44853,44848,44590,44594,44591,44840,44844,44846,44844,44841,44835,45098,45100,45103,45096,45102,45109,45099,45358,45357,45366,45354,45364,45366,45122,45116,45382,45120,45118,45126,45126,44868,44868,44863,44867,44862,44869,44858,44868,44605,44093,44094,44358,44350,44097,44090,44092,43830,43835,43837,43326,43321,43322,43064,43067,43322,43064,43065,42808,42549,42554,42550,42555,42549,42550,42552,42810,42550,42547, +50434,39151,38898,40696,41981,41726,41469,41469,41465,41470,41205,40942,40959,40702,40961,40699,40459,40447,40459,40709,40712,40702,40963,40709,40705,40703,41731,42497,42500,42496,42500,42752,42759,42754,42755,42754,43268,43259,43269,43268,43271,43525,43790,43794,43796,44049,44052,44050,44052,44073,44341,44337,44339,44333,44329,44314,44313,44563,44824,44822,44821,44568,44576,44573,44821,44827,44828,44820,44816,44813,45076,45073,45067,45055,45065,45080,45072,45332,45333,45348,45339,45341,45330,45080,45082,45352,45090,45077,45091,45111,44843,44805,44796,44801,44798,44805,44794,44801,44538,44026,44024,44289,44284,44036,44038,43792,43535,43541,43543,43290,43280,43284,43031,43033,43288,42773,42774,42772,42514,42520,42515,42520,42516,42518,42519,42778,42517,42515, +50692,38913,38916,40971,41743,41487,41230,41230,41227,41235,40976,40974,40985,40725,40727,40719,40734,40722,40733,40727,40731,40720,40726,40732,40724,40724,41754,42523,42525,42777,42781,42774,43039,43034,43037,43037,43041,43034,43555,43553,43556,43809,43812,44071,44068,44065,44070,44071,44327,44325,44338,44341,44346,44348,44608,44604,44608,44861,44866,44868,44860,44853,44857,44861,44855,45116,45112,44852,44848,44844,45098,45091,45097,45099,45108,45113,45100,45362,45361,45371,45098,45108,45106,45116,45119,45133,45125,45118,45122,45105,45080,44825,45078,45083,44563,44568,44558,44564,44302,44303,44301,44309,44046,44050,43789,44050,43788,43534,43277,43024,43016,43019,42764,42767,43020,42507,42252,42507,42506,42510,42504,42508,41990,42248,42249,42507,42502,42500, +50425,38875,38879,41191,41706,41450,41193,41195,41192,40945,40941,40936,40950,40687,40683,40675,40690,40677,40684,40677,40680,40671,40678,40682,40675,40672,41697,42208,42465,42719,42723,42719,42986,42985,42992,42995,42998,42733,43508,43761,43762,43756,43763,44020,44017,44014,44018,44017,44278,44555,44336,44347,44348,44340,44589,44577,44580,44828,44832,44836,44836,44840,44849,44858,44855,45117,45112,44854,44845,44839,45089,45077,45077,45072,45090,45100,45086,45343,45341,45354,45080,44831,45083,45085,45084,45101,45097,45090,45090,45087,45038,44745,45248,44996,44480,44235,44233,44245,44243,44250,44249,44256,43991,43993,43731,43737,43729,43475,43217,42966,42963,42969,42716,42720,42719,42461,42465,42465,42463,42466,42202,42206,41689,42203,42203,42460,42454,42452, +50438,38924,38670,41240,41499,41500,41242,40985,40980,40984,40975,41230,41244,40992,40741,40476,40748,40737,40748,40485,40490,40480,40744,40748,40740,40998,42029,42540,42800,42795,42799,42794,43058,43055,43059,43058,43061,43055,43320,43574,43835,43831,43837,43837,43835,44088,44092,44091,44089,44349,44109,44371,44357,44346,44600,44592,44599,44596,44857,44599,44597,44601,44610,44621,44616,44876,45131,44871,44864,44861,44861,44858,45117,45111,45121,45127,45118,45118,45111,45115,45100,45105,45098,45103,45103,45119,45123,45129,45139,45138,45109,44842,45096,45103,44586,44336,44329,44334,44328,44073,44070,44077,43814,43816,43811,43815,43293,43298,43042,42790,42781,42782,42528,42531,42529,42527,42530,42529,42270,42275,42267,42271,42010,42267,42014,42273,42271,42269, +50427,38889,38891,41203,41460,41462,41203,40946,40941,40947,40940,40936,40953,40692,40438,40428,40698,40687,40696,40434,40437,40427,40692,40698,40691,40950,42495,43008,43013,42752,42755,42750,43013,43010,43013,43013,43019,43012,43275,43526,43785,43781,43784,43779,43776,44030,44033,44032,44034,44053,44086,44351,44330,44308,44305,44295,44300,44297,44304,44308,44309,44566,44573,44579,44576,44583,44840,44838,44831,44826,44820,44812,45074,45068,45074,45088,45087,45095,45094,45092,45071,45078,45071,45072,45071,45086,45080,45082,45095,45096,45087,44813,44802,45064,44545,44292,44282,44288,44280,44026,44027,44035,43773,43779,43775,43781,43263,43267,43010,42757,42754,42756,42498,42498,42495,42236,42242,42241,42238,42242,42237,42240,41976,41975,41720,41977,41973,41970, +50436,38910,39168,41223,41481,41226,40967,40966,40963,40713,40449,40443,40455,40451,40453,40446,40716,40704,40714,40451,40454,40441,40706,40967,40960,41217,42504,42759,42762,42758,42762,42755,43019,43015,43017,43017,43021,43014,43278,43531,43534,43788,43792,43792,43791,44045,44049,44047,44046,44040,44035,44294,44313,44333,44335,44334,44342,44338,44084,44340,44335,44590,44596,44597,44589,44593,44848,44844,44841,44842,44849,44849,45112,45109,45118,45118,45103,45104,45098,45106,45093,45105,45099,45107,45104,45116,45109,45101,45109,45114,45123,44884,44881,45142,44622,44629,44363,44370,44363,44106,44103,44111,43848,43850,43845,43851,43332,43335,43080,42826,42819,42823,42825,42827,42565,42306,42309,42307,42305,42309,42045,42050,42045,42045,41789,42047,42043,42040, +50169,38875,39649,41186,40931,40675,40674,40675,40672,40421,40153,40146,40156,40663,40664,40656,40669,40659,40672,40669,40676,40665,40670,40930,41182,41436,42467,42720,42720,42716,42720,42717,42979,42975,42977,42973,42975,42968,43233,43226,43224,43475,43737,43739,43738,43734,43996,43995,43990,43996,44024,44287,44284,44274,44528,44525,44538,44540,44548,44547,44544,44542,44550,44551,44800,44806,44809,44808,44803,44798,45052,45050,45051,45048,44805,45071,45066,45070,45071,45080,45060,45060,45044,45048,45046,45057,44794,44789,44795,44805,44790,44785,44775,44782,44777,44786,44265,44273,44011,43756,43755,43762,43755,43756,43752,43501,42982,42985,42987,42990,42984,42475,42477,42477,42475,42217,42220,42220,41961,41709,41701,41706,41703,41960,41960,41703,41700,41698, +50183,38928,39957,40985,40730,40473,40729,40729,40723,40724,40456,40456,40475,40732,40734,40726,40742,40732,40743,40737,40740,40726,40730,40733,41243,41500,42533,42790,42794,42790,42794,42788,43050,43046,43048,43046,43049,43042,43307,43308,43310,43565,43824,43827,43833,43841,44115,44127,44135,44139,44140,44388,44381,44364,44619,44620,44636,44635,44637,44635,44631,44632,44639,44640,44887,44887,44885,44881,44878,44878,45139,45138,45144,45139,44885,45147,45137,45141,45139,45152,45139,45146,45132,45130,45126,45143,44878,44874,44886,44907,44909,44906,44904,44910,44903,44909,44387,44398,44137,43880,43879,43886,43880,43883,43877,43622,43100,43103,43106,43109,43103,42590,42334,42334,42588,42330,42333,42333,41818,41569,41819,41823,41820,41819,41821,41566,41820,41816, +50179,38658,39944,40972,40717,40718,40715,40715,40713,40723,40460,40460,40472,40466,40470,40468,40487,40990,40999,40734,40738,40721,40468,40731,41243,41496,42271,42783,42784,42779,42781,42775,42783,42778,42782,43297,43300,43291,43299,43302,43313,43579,43852,43870,43875,43874,43877,44134,44131,44143,44169,44435,44430,44414,44404,44402,44672,44672,44417,44671,44662,44399,44405,44407,44911,44917,44657,44917,44917,44911,44919,44926,44924,44912,44922,44936,44933,44930,44912,44925,45174,45177,44910,45422,45416,45175,45171,44913,44923,44949,45210,44944,44933,44940,44936,44944,44419,44425,44161,43906,43907,43915,43906,43905,43897,43387,42864,42865,42866,43124,42868,42877,42362,42362,42357,42355,42101,42102,41846,41850,41841,41845,41844,41844,41849,41850,41846,41842, +50182,38919,40463,40721,40467,40724,40723,40723,40722,40734,40472,40464,40473,40468,40472,40464,40479,40982,40991,40728,40732,40721,40472,40735,41243,41498,42272,42784,42786,42780,42784,42778,42784,42781,42783,43297,43303,43298,43565,43564,43312,43566,43830,43830,43828,43825,43827,44084,44089,44115,44379,44380,44377,44376,44373,44353,44616,44610,44357,44613,44609,44349,44353,44354,44859,44866,44608,44862,44857,44857,44861,44862,44867,44862,44870,44874,44864,44611,44862,44867,45110,45118,44854,45373,45372,45135,44874,44615,44635,44645,44634,44868,44857,44864,44602,44607,44341,44347,44083,43828,43827,43833,43826,43829,43567,43314,42794,43053,43055,43059,42796,42798,42285,42286,42283,42281,42027,42026,41768,41772,41765,41770,41510,41765,41768,41770,41767,41764, +50176,39155,40439,40439,40443,40701,40444,40187,40184,40189,40176,40168,40175,40433,40440,40689,40446,40434,40440,40945,40948,40934,40939,40941,40938,41965,42741,42740,42743,42995,42998,42994,43000,42999,43003,43259,43264,43260,43264,43262,43263,43515,43776,43780,43778,43775,44035,44033,44033,44059,44599,44095,44097,44093,44359,44351,44358,44350,44353,44353,44346,44343,44345,44344,44335,44341,44343,44343,44345,44351,44616,44614,44611,44605,44872,45139,45126,44611,45119,45381,45110,45122,45378,45129,45118,45118,44844,44592,44608,44619,44355,44323,44315,44324,44061,44065,43800,43806,43800,43803,43803,43810,43803,43806,43545,43548,43288,43290,43292,42780,42519,42526,42271,42271,42273,42016,42018,42018,42017,41765,41502,41505,41756,42013,42016,41504,41759,41757, +50181,39433,40722,40467,40470,40726,40469,40470,39695,39957,40211,40213,40228,39968,40228,40734,40492,40482,40492,41000,41004,40994,40999,41001,40995,42021,42797,42793,42797,43047,43055,43050,43054,43050,43054,43309,43314,43309,43314,43311,43317,43567,43829,43832,43827,43824,44088,44090,44091,44101,44099,44095,44098,44104,44624,44618,44627,44621,44622,44363,44361,44614,44617,44358,44349,44612,44613,44354,44350,44349,44608,44609,44617,44868,44872,44621,44609,44616,44877,44891,45135,45144,44877,45136,45134,45146,44869,44598,44606,44613,44360,44357,44352,44358,44095,44103,43838,43843,43836,43838,43838,43844,43578,43324,43577,43067,42804,42806,42810,42301,42032,42026,42548,42551,42550,42035,42037,42036,42034,41782,41518,41521,41776,41519,41521,41522,41262,41259, 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+33992,16340,13751,9633,7571,7826,7576,7319,6808,7320,7324,6297,4487,4758,6304,7853,8354,7850,6554,6048,5270,5013,5259,5253,5521,6032,5774,5773,5775,5775,4741,5523,6547,6806,7841,8091,8090,7837,7316,7311,7316,7572,8604,7324,6801,6801,4995,4214,4487,5273,4292,4055,3812,3817,3808,4839,4844,4843,4836,4830,4574,4571,4826,5093,3808,4050,4049,3792,4055,4063,3806,4299,4291,4539,5071,5327,5852,6368,5850,6105,6124,6632,7915,5075,3539,3526,3025,3536,4047,3787,3769,4008,4006,4524,4518,4258,3499,2979,3236,4017,5554,5290,5815,5548,5291,5032,5549,4773,5034,5547,17133,18951,9656,10686,6578,6571,7095,7356,7096,7102,7624,7882,7892,7642,7639,7127,7120,6870}; + +//¼ÆËãͼƬ +int ftt_test(void) +{ + int i,j; + int mLen = 128, nLen = 128; + bool flag = 0; + RK_complex_INT *A_In; + + //ÅжÏÊÇ·ñÂú×㳤¶ÈÒªÇó + int M = nexttopow2(mLen); //Èç¹ûinit_mLen²»ÊÇ2µÄÃݴη½£¬Ôò½«³¤¶ÈÉèΪ²»Ð¡ÓÚinit_mLenµÄ×îС2µÄÃݴη½ÕûÊý£¬M¼´Îª´ÎÊý + int N = nexttopow2(nLen); + + mLen = Pow2_table[M]; //ÐÂµÄ¸ß + nLen = Pow2_table[N]; + + A_In = (RK_complex_INT *)malloc(sizeof(RK_complex_INT)*nLen*mLen); + + for(i=0; i +#include +#include "cpu_test.h" + +.text + +//r0,array0 +ENTRY(test_cpus_l1_0) + + stmfd sp!, { r1 - r12, lr } +1: mov r0,r0 + //b 1b + mov r4,r0 + + test_cpus_l1_loop_200_k + test_cpus_l1_loop_200_k + test_cpus_l1_loop_200_k + test_cpus_l1_loop_200_k + test_cpus_l1_loop_200_k + + test_cpus_l1_loop_200_k + test_cpus_l1_loop_200_k + test_cpus_l1_loop_200_k + test_cpus_l1_loop_200_k + test_cpus_l1_loop_200_k + + //test_cpus_l1_loop_200_k + //test_cpus_l1_loop_200_k + //test_cpus_l1_loop_200_k + + +1: mov r1,r1 + //b 1b + ldmfd sp!, { r1 - r12, pc } +l1_test_error: + mov r1,r1 + mov r1,r1 + mov r1,r1 + 1: mov r1,r1 + b 1b +ENDPROC(test_cpus_l1_0) + + +//r0 adr base,r1 end adr,r2 tst date +ENTRY(test_cpus_l2) + + stmfd sp!, { r3 - r12, lr } +1: mov r0,r0 + //b 1b + + mov r4,r0 + sub r5,r1,#4 + +l2_write: + str r2,[r4],#4 + + cmp r4,r5 + bls l2_write + + mov r4,r0 +l2_check: + ldr r6,[r4],#4 + cmp r6,r2 + bne l2_test_error + mov r6,#0 + cmp r4,r5 + bhi l2_tst_end + + ldr r7,[r4],#4 + cmp r7,r2 + bne l2_test_error + mov r7,#0 + + cmp r4,r5 + bls l2_check + +l2_tst_end: +3: mov r0,#0 + //b 3b + ldmfd sp!, { r3 - r12, pc } +l2_test_error: +1: mov r0,#1 + //b 1b + ldmfd sp!, { r3 - r12, pc } +ENDPROC(test_cpus_l2) + +//r0 adr base,r1 end adr,r2 tst date +ENTRY(test_cpus_mem_set) + + stmfd sp!, { r3 - r12, lr } +1: mov r0,r0 + //b 1b + + mov r4,r0 + sub r5,r1,#4 + +mem_set: + str r2,[r4],#4 + + cmp r4,r5 + bls mem_set + +1: mov r0,#1 + //b 1b + ldmfd sp!, { r3 - r12, pc } +ENDPROC(test_cpus_mem_set) + + + +//r0 adr base,r1 end adr,r2 tst date +ENTRY(test_cpus_mem_check) + + stmfd sp!, { r3 - r12, lr } +1: mov r0,r0 + //b 1b + mov r4,r0 + sub r5,r1,#4 + +mem_check: + ldr r6,[r4],#4 + cmp r6,r2 + bne mem_check_error + mov r6,#0 + cmp r4,r5 + bhi mem_check_end + + ldr r7,[r4],#4 + cmp r7,r2 + bne mem_check_error + mov r7,#0 + + cmp r4,r5 + bls mem_check + +mem_check_end: +3: mov r0,#0 + //b 3b + ldmfd sp!, { r3 - r12, pc } +mem_check_error: +1: mov r0,#1 + //b 1b + ldmfd sp!, { r3 - r12, pc } + +ENDPROC(test_cpus_mem_check) +/***************while for dbg***************/ +ENTRY(rk30_cpu_while_tst) +stmfd sp!, { r3 - r12, lr } + +1: mov r3,r3 + b 1b + +ldmfd sp!, { r3 - r12, pc } + +ENDPROC(rk30_cpu_while_tst) + diff --git a/arch/arm/mach-rockchip/rk_pm_tests/ft/ft_cpu_tst1.S b/arch/arm/mach-rockchip/rk_pm_tests/ft/ft_cpu_tst1.S new file mode 100755 index 000000000000..6f96fceda9d4 --- /dev/null +++ b/arch/arm/mach-rockchip/rk_pm_tests/ft/ft_cpu_tst1.S @@ -0,0 +1,44 @@ + +#include +#include +//#include +//#include +#include "cpu_test.h" + +.text + +//r0,array0 +ENTRY(test_cpus_l1_1) + stmfd sp!, { r1 - r12, lr } +1: mov r0,r0 + //b 1b + mov r4,r0 + + test_cpus_l1_loop_200_k + test_cpus_l1_loop_200_k + test_cpus_l1_loop_200_k + test_cpus_l1_loop_200_k + test_cpus_l1_loop_200_k + + + test_cpus_l1_loop_200_k + test_cpus_l1_loop_200_k + test_cpus_l1_loop_200_k + test_cpus_l1_loop_200_k + test_cpus_l1_loop_200_k + + +1: mov r1,r1 + //b 1b + ldmfd sp!, { r1- r12, pc } +l1_test_error: +1: mov r1,r1 + b 1b +ENDPROC(test_cpus_l1_1) + + + + + + + diff --git a/arch/arm/mach-rockchip/rk_pm_tests/ft/ft_test.c b/arch/arm/mach-rockchip/rk_pm_tests/ft/ft_test.c new file mode 100644 index 000000000000..9b30a44f8ac2 --- /dev/null +++ b/arch/arm/mach-rockchip/rk_pm_tests/ft/ft_test.c @@ -0,0 +1,1073 @@ +/* arch/arm/mach-rk30/rk_pm_tests.c + * + * Copyright (C) 2010 ROCKCHIP, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + + +/*************************************************************************/ +/* COPYRIGHT (C) ROCK-CHIPS FUZHOU . ALL RIGHTS RESERVED.*/ +/************************************************************************* +FILE : ft_test.c +DESC : ft test +AUTHOR : xie xiu xin +DATE : 2013-7-2 +NOTES : +$LOG: GPIO.C,V $ +REVISION 0.01 +#include +#include + ***************************************************************************/ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +//#include +//#include +//#include +//#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + + +#if 1 +#define ft_printk(fmt, arg...) \ + printk(KERN_EMERG fmt, ##arg) + //KERN_DEBUG +#define ft_printk_dbg(fmt, arg...) \ + printk(KERN_EMERG fmt, ##arg) + + //KERN_WARNING +#define ft_printk_info(fmt, arg...) \ + printk(KERN_EMERG fmt, ##arg) +#else + +#define ft_printk(fmt, arg...) \ + printk(fmt, ##arg) + //printk(KERN_EMERG fmt, ##arg) + //KERN_DEBUG +#define ft_printk_dbg(fmt, arg...) {while(0);} + + //KERN_WARNING +#define ft_printk_info(fmt, arg...) {while(0);} +#endif + + +#define MHZ (1000*1000) +#define TST_SETUPS (4) + +//#define ENABLE_FT_SUSPEND_TST // for ft seting 1.6G volt + +#define l1_DCACHE_SIZE (32*1024) +#define l2_DCACHE_SIZE (512*1024) +#define TST_TASK_NUM (10*10*3) + + +static unsigned long arm_setups_rate[TST_SETUPS]={816*MHZ,1656*MHZ*0,1608*MHZ*0,312*MHZ*0}; +const static unsigned long ddr_setups_rate[TST_SETUPS]={600*0,800*1,800*1,600*1}; + +#define L1_JUST (0-10) +const static unsigned int l1_tst_cnt[TST_SETUPS]={5*10*2+L1_JUST,5*10*2+L1_JUST,5*10*2+L1_JUST,80+L1_JUST}; +const static unsigned int l2_cpy_cnt[TST_SETUPS]={5,5,4,4}; +const static unsigned int ftt_tst_cnt [TST_SETUPS]={1,1,1,0}; +const static unsigned int pi_tst_cnt[TST_SETUPS]={12,12,10,8}; +const static unsigned int stp_task_num[TST_SETUPS]={300,250,250,80}; + +static u32 ft_end_cnt=0x24; + +// +#define get_setup_tasks(a) ft_get_min(a,TST_TASK_NUM) + +//0-7 :test setup1 +#define CPU_TST_L1_STP0 (1<<0) +#define CPU_TST_L2_STP0 (1<<1) + +static DEFINE_PER_CPU(int [TST_SETUPS], cpu_tst_flags)={0}; +static DEFINE_PER_CPU(wait_queue_head_t [TST_SETUPS][TST_TASK_NUM], wait_setups); +static DEFINE_PER_CPU(struct mutex[TST_SETUPS], lzo_lock); +static DEFINE_PER_CPU(struct mutex[TST_SETUPS], l2_lock); +static DEFINE_PER_CPU(u32, sem_setups_cnt); +static DEFINE_PER_CPU(unsigned char *, lzo_wrk); + +struct tst_task_struct { + struct task_struct *task; + u32 thread_id; + int cpu; + int tst_step; +}; + +static struct tst_task_struct tst_task_date[TST_TASK_NUM][NR_CPUS]; +static struct semaphore sem_setups[TST_SETUPS]; +static int setups_flag[TST_SETUPS]={0,0,0,0}; + +static struct clk *arm_clk; + +#ifdef FT_DDR_FREQ +static struct clk *ddr_clk; +#endif + +void ft_test_flag_seting(void); + +int ftt_test(void); +int test_cpus_l2(char *data_s,char *data_e,u32 data); +int Test_mem(void *aligned, unsigned long b_size) ; + +int test_cpus_mem_set(char *data_s,char *data_e,u32 data); +int test_cpus_mem_check(char *data_s,char *data_e,u32 data); + + +#define BUF_SIZE (l2_DCACHE_SIZE*8)// tst buf size + +#define BUF_SIZE_M (BUF_SIZE)// tst buf size + +static char memtest_buf0[BUF_SIZE] __attribute__((aligned(4096))); +#if (NR_CPUS>=2) +static char memtest_buf1[BUF_SIZE] __attribute__((aligned(4096))); +#if (NR_CPUS>=4) +static char memtest_buf2[BUF_SIZE] __attribute__((aligned(4096))); +static char memtest_buf3[BUF_SIZE] __attribute__((aligned(4096))); +#if (NR_CPUS>=8) +static char memtest_buf4[BUF_SIZE] __attribute__((aligned(4096))); +static char memtest_buf5[BUF_SIZE] __attribute__((aligned(4096))); +static char memtest_buf6[BUF_SIZE] __attribute__((aligned(4096))); +static char memtest_buf7[BUF_SIZE] __attribute__((aligned(4096))); +#endif +#endif +#endif + +static char *l2_test_buf[NR_CPUS]= +{ + memtest_buf0, +#if (NR_CPUS>=2) + memtest_buf1, +#if (NR_CPUS>=4) + memtest_buf2, + memtest_buf3, +#if (NR_CPUS>=8) + memtest_buf4, + memtest_buf5, + memtest_buf6, + memtest_buf7, +#endif +#endif +#endif + +}; + +// for board init arm rate +unsigned long __init ft_test_init_arm_rate(void) +{ + return arm_setups_rate[0]; +} +static int ft_get_min(int a, int b) +{ + if(a40&&cnt1>40) + //ft_printk("."); + for(i=0;ithread_id==0) + { + + if(steps<2) + { + mutex_lock(&per_cpu(lzo_lock, cpu)[steps]); + + temp=lzo_cmp_decmp_tst((unsigned char *) test_cpus_l1_0,lzo_dcmp_size, + test_mal_buf[cpu],sizeof(char)*BUF_SIZE,per_cpu(lzo_wrk, cpu)); + if(temp) + per_cpu(cpu_tst_flags, cpu)[steps]|=CPU_TST_L1_STP0; + + temp=lzo_cmp_decmp_tst((unsigned char *) test_cpus_l1_1,lzo_dcmp_size, + test_mal_buf[cpu],sizeof(char)*BUF_SIZE,per_cpu(lzo_wrk, cpu)); + if(temp) + per_cpu(cpu_tst_flags, cpu)[steps]|=CPU_TST_L1_STP0; + + mutex_unlock(&per_cpu(lzo_lock, cpu)[steps]); + + + if(ftt_test()) + { + ft_printk("ftt_test err(%d,%d)\n",task_data->thread_id,cpu); + while(1); + } + if(calc_pi()==(-EPERM)) + { + ft_printk("calc_pi err(%d,%d)\n",task_data->thread_id,cpu); + while(1); + } + + } + msleep(50); + + ft_cpu_l1_test(l1_tst_cnt[steps]/2,l1_tst_cnt[steps]/2); + + ft_printk("."); + + mutex_lock(&per_cpu(l2_lock, cpu)[steps]); + if(steps==0) + { + temp=ft_test_cpus_l2_memcpy(NULL,l2_test_buf[cpu],sizeof(char)*BUF_SIZE,l2_cpy_cnt[steps]); + } + else + temp=ft_test_cpus_l2_memcpy(test_mal_buf[cpu],l2_test_buf[cpu],sizeof(char)*BUF_SIZE_M,l2_cpy_cnt[steps]); + + if(temp) + per_cpu(cpu_tst_flags, cpu)[steps]|=CPU_TST_L2_STP0; + + msleep(50); + #if 1 + // max rate test //1658 + if(steps==1) + { + + //ft_printk("ft_test_mem l2 end (%d,%d)",task_data->thread_id,cpu); + temp=ft_test_mem((void *)l2_test_buf[cpu], l2_DCACHE_SIZE+l2_DCACHE_SIZE/20,1) ;//l2_DCACHE_SIZE + //if(cpu==0) + //ft_printk("."); + + if(temp) + per_cpu(cpu_tst_flags, cpu)[steps]|=CPU_TST_L2_STP0; + } + #endif + + //ft_printk("test_type0 l2 end (%d,%d)",task_data->thread_id,cpu); + mutex_unlock(&per_cpu(l2_lock, cpu)[steps]); + + + } + + if((task_data->thread_idthread_id%2) + ft_cpu_l1_test(1,0); + else + ft_cpu_l1_test(0,1); + + } + + if(steps<2) + { + if(get_setup_tasks(stp_task_num[steps])>pi_tst_cnt[steps]) + id_start=get_setup_tasks(stp_task_num[steps])-pi_tst_cnt[steps]; + else + id_start=1; + + if(task_data->thread_id>=(id_start)) + { + //ft_printk("calc_pi st=%d(%d,%d)\n",id_start,task_data->thread_id,cpu); + if(calc_pi()==(-EPERM)) + { + ft_printk("calc_pi err(%d,%d)\n",task_data->thread_id,cpu); + while(1); + } + + } + } + + +} + + +int ft_cpu_test_type0_check(int steps,const char *str) +{ + int cpu, ret = 0,i; + + + for (cpu = 0; cpu < NR_CPUS; cpu++) + for(i=0;i=rate) + { + clk_set_rate(arm_clk,arm_setups_rate[steps]); + #ifdef FT_DDR_FREQ + if(ddr_setups_rate[steps]) + { + ddr_change_freq(ddr_setups_rate[steps]); + clk_set_rate(ddr_clk,0); + } + #endif + + } + + setups_flag[steps-1]=1; + for (cpu = 0; cpu < NR_CPUS; cpu++) + { + wake_up(&per_cpu(wait_setups, cpu)[steps-1][0]); + } + + + for (cpu = 0; cpu < NR_CPUS; cpu++) + for(i=0;ithread_id==0) + { + per_cpu(sem_setups_cnt, cpu)=0; + rk_ft_tests_cpus_init(cpu); + + for(i=1;ithread_idthread_id); + up(&sem_setups[0]); + } + + // steps 1 + if(task_data->thread_idthread_id],(setups_flag[0]==1)||kthread_should_stop()); + + + if(task_data->thread_id==0) + { + + per_cpu(sem_setups_cnt, cpu)=0; + for(i=1;ithread_id); + up(&sem_setups[1]); + } + + + if(task_data->thread_idthread_id],(setups_flag[1]==1)||kthread_should_stop()); + + if(task_data->thread_id==0) + { + per_cpu(sem_setups_cnt, cpu)=0; + for(i=1;ithread_id); + up(&sem_setups[2]); + } + + + if(task_data->thread_idthread_id],(setups_flag[2]==1)||kthread_should_stop()); + + + if(task_data->thread_id==0) + { + + per_cpu(sem_setups_cnt, cpu)=0; + + for(i=1;ithread_id); + up(&sem_setups[3]); + } + return 0; +} + +int rk_ft_tests_cpus_init(int cpu) +{ + int i,ret = 0,j; + struct sched_param param = { .sched_priority = 0 }; + char *buf; + unsigned char *wrk; + struct task_struct *task; + + //arm_clk=clk_get(NULL, "cpu"); + + // malloc buf + test_mal_buf[cpu]=NULL; + buf = kmalloc(BUF_SIZE_M, GFP_KERNEL); + if (buf) + { + test_mal_buf[cpu]=buf; + //printk("xdbg but=%x\n",(void*)buf); + } + + for(i=0;i +#include +#include +#include +#include + +#include "../../pm.h" + +/* GPIO control registers */ +#define GPIO_SWPORT_DR 0x00 +#define GPIO_SWPORT_DDR 0x04 +#define GPIO_INTEN 0x30 +#define GPIO_INTMASK 0x34 +#define GPIO_INTTYPE_LEVEL 0x38 +#define GPIO_INT_POLARITY 0x3c +#define GPIO_INT_STATUS 0x40 +#define GPIO_INT_RAWSTATUS 0x44 +#define GPIO_DEBOUNCE 0x48 +#define GPIO_PORTS_EOI 0x4c +#define GPIO_EXT_PORT 0x50 +#define GPIO_LS_SYNC 0x60 + + +static void rk3288_pin_set_fun(u8 port,u8 bank,u8 b_gpio,u8 fun) +{ + u8 off_set; + bank-=0xa; + + if(port==0) + { + if(bank>2) + return; + off_set=RK3288_PMU_GPIO0_A_IOMUX+bank*4; + pmu_writel(RKPM_VAL_SETBITS(pmu_readl(off_set),fun,b_gpio*2,0x3),off_set); + } + else if(port==1||port==2) + { + off_set=port*(4*4)+bank*4; + reg_writel(RKPM_W_MSK_SETBITS(fun,b_gpio*2,0x3),RK_GRF_VIRT+0+off_set); + } + else if(port==3) + { + if(bank<=2) + { + off_set=0x20+bank*4; + reg_writel(RKPM_W_MSK_SETBITS(fun,b_gpio*2,0x3),RK_GRF_VIRT+0+off_set); + + } + else + { + off_set=0x2c+(b_gpio/4)*4; + reg_writel(RKPM_W_MSK_SETBITS(fun,(b_gpio%4)*4,0x3),RK_GRF_VIRT+0+off_set); + } + + } + else if(port==4) + { + if(bank<=1) + { + off_set=0x34+bank*8+(b_gpio/4)*4; + reg_writel(RKPM_W_MSK_SETBITS(fun,(b_gpio%4)*4,0x3),RK_GRF_VIRT+0+off_set); + } + else + { + off_set=0x44+(bank-2)*4; + reg_writel(RKPM_W_MSK_SETBITS(fun,b_gpio*2,0x3),RK_GRF_VIRT+0+off_set); + } + + } + else if(port==5||port==6) + { + off_set=0x4c+(port-5)*4*4+bank*4; + reg_writel(RKPM_W_MSK_SETBITS(fun,b_gpio*2,0x3),RK_GRF_VIRT+0+off_set); + } + else if(port==7) + { + if(bank<=1) + { + off_set=0x6c+bank*4; + reg_writel(RKPM_W_MSK_SETBITS(fun,b_gpio*2,0x3),RK_GRF_VIRT+0+off_set); + } + else + { + off_set=0x74+(bank-2)*8+(b_gpio/4)*4; + //rkpm_ddr_printascii("gpio"); + //rkpm_ddr_printhex(off_set); + //rkpm_ddr_printascii("-"); + //rkpm_ddr_printhex((b_gpio%4)*4); + + reg_writel(RKPM_W_MSK_SETBITS(fun,(b_gpio%4)*4,0x3),RK_GRF_VIRT+0+off_set); + + //rkpm_ddr_printhex(reg_readl(RK_GRF_VIRT+0+off_set)); + //rkpm_ddr_printascii("\n"); + } + + } + else if(port==8) + { + if(bank<=1) + { + off_set=0x80+bank*4; + reg_writel(RKPM_W_MSK_SETBITS(fun,b_gpio*2,0x3),RK_GRF_VIRT+0+off_set); + } + } + +} +static void pin_set_fun(u32 pins) +{ + rk3288_pin_set_fun(RKPM_PINBITS_PORT(pins),RKPM_PINBITS_BANK(pins), + RKPM_PINBITS_BGPIO(pins),RKPM_PINBITS_FUN(pins)); +} + +static void rk3288_gpio_set_in_output(u8 port,u8 bank,u8 b_gpio,u8 type) +{ + u32 val; + + bank-=0xa; + b_gpio=bank*8+b_gpio;// + + val=reg_readl(RK_GPIO_VIRT(port)+GPIO_SWPORT_DDR); + + if(type==RKPM_GPIO_OUTPUT) + val|=(0x1<>b_gpio)&0x1; +} +static u8 gpio_get_input_level(u32 pins) +{ + + return rk3288_gpio_get_input_level(RKPM_PINBITS_PORT(pins),RKPM_PINBITS_BANK(pins), + RKPM_PINBITS_BGPIO(pins)); +} + + diff --git a/arch/arm/mach-rockchip/rk_pm_tests/ft/test_mem.c b/arch/arm/mach-rockchip/rk_pm_tests/ft/test_mem.c new file mode 100755 index 000000000000..f32348658f13 --- /dev/null +++ b/arch/arm/mach-rockchip/rk_pm_tests/ft/test_mem.c @@ -0,0 +1,447 @@ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +//#include "..\common\config.h" + +//#define TEST_VALUE 0xAAAAAAAA//0x55555555 + + + + + +#define TEST_VALUE 0x55555555 +#define UL_ONEBITS 0xffffffff +//#define TEST_DEBUG_EN 0 +#define UL_BYTE(x) ((x | x << 8 | x << 16 | x << 24)) +#define BUF_SIZE (256 * 1024) //(256 * 1024) + +//static char memtest_buf[BUF_SIZE] __attribute__((aligned(4096))); + +#define printf(fmt, arg...) \ + printk(KERN_EMERG fmt, ##arg) + + +//char* pTestmem=(char *)CACHE_FIFO_STAR_ADDR0; + +typedef unsigned long ul; +typedef unsigned long volatile ulv; + +static int compare_regions(ulv *bufa, ulv *bufb, ul count) +{ + int r = 0; + ul i; + ulv *p1 = bufa; + ulv *p2 = bufb; + // int n=0; + + for (i = 0; i < count; i++, p1++, p2++) + { + if (*p1 != *p2) + { + r = -1; + // n++; + // if(n>10) + // { + break; + // } + } + } + return r; +} + +static int compare_regions_reverse(ulv *bufa, ulv *bufb, ul count) +{ + int r = 0; + ul i; + ulv *p1 = bufa; + ulv *p2 = bufb; + // int n=0; + + for (i = 0; i < count; i++, p1++, p2++) + { + if (*p1 != ~(*p2)) + { + r = -1; + // n++; + // if(n>10) + // { + break; + // } + } + } + return r; +} + +static int test_stuck_address(ulv *bufa, ul count) +{ + ulv *p1 = bufa; + ul j; + ul i; + + for (j = 0; j < 16; j++) + { + p1 = (ulv *) bufa; + for (i = 0; i < count; i++) + { + *p1 = (((j + i) % 2) == 0 ? (ul) p1 : ~((ul) p1)); + *p1++; + } + p1 = (ulv *) bufa; + for (i = 0; i < count; i++, p1++) + { + if (*p1 != (((j + i) % 2) == 0 ? (ul) p1 : ~((ul) p1))) + { + return -1; + } + } + } + return 0; +} + +static int test_random_value(ulv *bufa, ulv *bufb, ul count) +{ + ulv *p1 = bufa; + ulv *p2 = bufb; + ul i; + + for (i = 0; i < count; i++) + { + *p1++ = *p2++ = TEST_VALUE; + } + return compare_regions(bufa, bufb, count); +} + +static int test_xor_comparison(ulv *bufa, ulv *bufb, ul count) +{ + ulv *p1 = bufa; + ulv *p2 = bufb; + ul i; + ul q = TEST_VALUE; + + for (i = 0; i < count; i++) + { + *p1++ ^= q; + *p2++ ^= q; + } + return compare_regions(bufa, bufb, count); +} + +static int test_sub_comparison(ulv *bufa, ulv *bufb, ul count) +{ + ulv *p1 = bufa; + ulv *p2 = bufb; + ul i; + ul q = TEST_VALUE; + + for (i = 0; i < count; i++) + { + *p1++ -= q; + *p2++ -= q; + } + return compare_regions(bufa, bufb, count); +} + +static int test_mul_comparison(ulv *bufa, ulv *bufb, ul count) +{ + ulv *p1 = bufa; + ulv *p2 = bufb; + ul i; + ul q = TEST_VALUE; + + for (i = 0; i < count; i++) + { + *p1++ *= q; + *p2++ *= q; + } + return compare_regions(bufa, bufb, count); +} + +static int test_div_comparison(ulv *bufa, ulv *bufb, ul count) +{ + ulv *p1 = bufa; + ulv *p2 = bufb; + ul i; + ul q = TEST_VALUE; + + for (i = 0; i < count; i++) + { + if (!q) + { + q++; + } + *p1++ /= q; + *p2++ /= q; + } + return compare_regions(bufa, bufb, count); +} + +static int test_or_comparison(ulv *bufa, ulv *bufb, ul count) +{ + ulv *p1 = bufa; + ulv *p2 = bufb; + ul i; + ul q = TEST_VALUE; + + for (i = 0; i < count; i++) + { + *p1++ |= q; + *p2++ |= q; + } + return compare_regions(bufa, bufb, count); +} + +static int test_and_comparison(ulv *bufa, ulv *bufb, ul count) +{ + ulv *p1 = bufa; + ulv *p2 = bufb; + ul i; + ul q = TEST_VALUE; + + for (i = 0; i < count; i++) + { + *p1++ &= q; + *p2++ &= q; + } + return compare_regions(bufa, bufb, count); +} + +static int test_seqinc_comparison(ulv *bufa, ulv *bufb, ul count) +{ + ulv *p1 = bufa; + ulv *p2 = bufb; + ul i; + ul q = TEST_VALUE; + ul value; + + for (i = 0; i < count; i++) + { + value = (i+q); + *p1++ = value; + *p2++ = ~value; + } + return compare_regions_reverse(bufa, bufb, count); +} + +static int test_solidbits_comparison(ulv *bufa, ulv *bufb, ul count) +{ + ulv *p1 = bufa; + ulv *p2 = bufb; + ul j; + ul q; + ul i; + ul value; + + for (j = 0; j < 64; j++) + { + q = ((j % 2) == 0 ? UL_ONEBITS : 0); + p1 = (ulv *) bufa; + p2 = (ulv *) bufb; + for (i = 0; i < count; i++) + { + value = ((i % 2) == 0 ? q : ~q); + *p1++ = value; + *p2++ = ~value; + } + if (compare_regions_reverse(bufa, bufb, count)) + { + return -1; + } + } + return 0; +} + +static int test_blockseq_comparison(ulv *bufa, ulv *bufb, ul count) +{ + ulv *p1 = bufa; + ulv *p2 = bufb; + ul j; + ul i; + ul value; + + for (j = 0; j < 256; j++) + { + p1 = (ulv *) bufa; + p2 = (ulv *) bufb; + for (i = 0; i < count; i++) + { + value = (ul) UL_BYTE(j); + *p1++ = value; + *p2++ = ~value; + } + if (compare_regions_reverse(bufa, bufb, count)) + { + return -1; + } + } + return 0; +} + +#define FT_FAILED (-1) +int Test_mem(void *aligned, unsigned long b_size) +{ + ulv *bufa, *bufb; + ul halflen, count; + // int i; + + halflen = b_size / 2; + count = halflen / sizeof(ul); + //aligned = memtest_buf; + bufa = (ulv *)aligned; + bufb = (ulv *)((ul)aligned + halflen); + + if (test_stuck_address(aligned, (BUF_SIZE) / sizeof(ul))) + { + printf("test_stuck_address_ error\n"); + return FT_FAILED;//-1; + } + if(test_random_value(bufa, bufb, count)) + { + printf("test_random_value_ error\n"); + return FT_FAILED;//-1; + } + if(test_xor_comparison(bufa, bufb, count)) + { + printf("test_xor_comparison_ error\n"); + return FT_FAILED;//-1; + } + if(test_sub_comparison(bufa, bufb, count)) + { + printf("test_sub_comparison_ error\n"); + return FT_FAILED;//-1; + } + // printf("test_sub_comparison_ OK\n"); + if(test_mul_comparison(bufa, bufb, count)) + { + printf("test_mul_comparison_ error\n"); + return FT_FAILED;//-1; + } + if(test_div_comparison(bufa, bufb, count)) + { + printf("test_div_comparison_ error\n"); + return FT_FAILED;//-1; + } + if(test_or_comparison(bufa, bufb, count)) + { + printf("test_or_comparison_ error\n"); + return FT_FAILED;//-1; + } + if(test_and_comparison(bufa, bufb, count)) + { + printf("test_and_comparison_ error\n"); + return FT_FAILED;//-1; + } + // printf("test_and_comparison_ OK\n"); + if(test_seqinc_comparison(bufa, bufb, count)) + { + printf("test_seqinc_comparison_ error\n"); + return FT_FAILED;//-1; + } + //printf("test_seqinc_comparison_ OK\n"); + + if(test_solidbits_comparison(bufa, bufb, count)) + { + printf("test_solidbits_comparison_ error\n"); + return FT_FAILED;//-1; + } + //printf("test_solidbits_comparison_ OK\n"); + if(test_blockseq_comparison(bufa, bufb, count)) + { + printf("test_blockseq_comparison_ error\n"); + return FT_FAILED;//-1; + } + + return 0; +} + +#if 0//def TEST_CPU123 +uint8 Test_mem123(char offset) +{ + void volatile *aligned; + ulv *bufa, *bufb; + ul halflen, count; + int i; + + halflen = BUF_SIZE / 2; + count = halflen / sizeof(ul); + aligned = pTestmem + (offset << 20); + bufa = (ulv *)aligned; + bufb = (ulv *)((ul)aligned + halflen); + + if (test_stuck_address(aligned, (BUF_SIZE) / sizeof(ul))) + { + printf("cpu%d test_stuck_address_ error\n",(offset+1)); + return FT_FAILED;//-1; + } + if(test_random_value(bufa, bufb, count)) + { + printf("cpu%d test_random_value_ error\n",(offset+1)); + return FT_FAILED;//-1; + } + if(test_xor_comparison(bufa, bufb, count)) + { + printf("cpu%d test_xor_comparison_ error\n",(offset+1)); + return FT_FAILED;//-1; + } + if(test_sub_comparison(bufa, bufb, count)) + { + printf("cpu%d test_sub_comparison_ error\n",(offset+1)); + return FT_FAILED;//-1; + } + // printf("test_sub_comparison_ OK\n"); + if(test_mul_comparison(bufa, bufb, count)) + { + printf("cpu%d test_mul_comparison_ error\n",(offset+1)); + return FT_FAILED;//-1; + } + if(test_div_comparison(bufa, bufb, count)) + { + printf("cpu%d test_div_comparison_ error\n",(offset+1)); + return FT_FAILED;//-1; + } + if(test_or_comparison(bufa, bufb, count)) + { + printf("cpu%d test_or_comparison_ error\n",(offset+1)); + return FT_FAILED;//-1; + } + if(test_and_comparison(bufa, bufb, count)) + { + printf("cpu%d test_and_comparison_ error\n",(offset+1)); + return FT_FAILED;//-1; + } + // printf("test_and_comparison_ OK\n"); + if(test_seqinc_comparison(bufa, bufb, count)) + { + printf("cpu%d test_seqinc_comparison_ error\n",(offset+1)); + return FT_FAILED;//-1; + } + //printf("test_seqinc_comparison_ OK\n"); + + if(test_solidbits_comparison(bufa, bufb, count)) + { + printf("cpu%d test_solidbits_comparison_ error\n",(offset+1)); + return FT_FAILED;//-1; + } + //printf("test_solidbits_comparison_ OK\n"); + if(test_blockseq_comparison(bufa, bufb, count)) + { + printf("cpu%d test_blockseq_comparison_ error\n",(offset+1)); + return FT_FAILED;//-1; + } + printf("cpu%d memory test ok\n",(offset+1)); + return FT_SUCCESS; +} +#endif + -- 2.34.1