From c1a9ae43885246df7a35c790960d7a703b2841d4 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Tue, 24 Sep 2013 21:26:23 +0300 Subject: [PATCH] drm/i915: De-magic the VLV p2 divider step size MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit The p2 divider on VLV needs to be even when it's > 10. The current code to make that happen is rather weird. Just make the step size adjustement in the for loop decrement step. Signed-off-by: Ville Syrjälä Reviewed-by: Mika Kuoppala Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_display.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index d984b10831a7..62cfada50735 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -688,9 +688,8 @@ vlv_find_best_dpll(const intel_limit_t *limit, struct drm_crtc *crtc, /* based on hardware requirement, prefer smaller n to precision */ for (clock.n = limit->n.min; clock.n <= ((refclk) / minupdate); clock.n++) { for (clock.p1 = limit->p1.max; clock.p1 > limit->p1.min; clock.p1--) { - for (clock.p2 = limit->p2.p2_fast+1; clock.p2 > 0; clock.p2--) { - if (clock.p2 > 10) - clock.p2--; + for (clock.p2 = limit->p2.p2_fast; clock.p2 > 0; + clock.p2 -= clock.p2 > 10 ? 2 : 1) { clock.p = clock.p1 * clock.p2; /* based on hardware requirement, prefer bigger m1,m2 values */ for (clock.m1 = limit->m1.min; clock.m1 <= limit->m1.max; clock.m1++) { -- 2.34.1