From c1df48dde21f1cf757c5381c968f4bbd217985bb Mon Sep 17 00:00:00 2001 From: Tilmann Scheller Date: Thu, 11 Sep 2014 10:45:50 +0000 Subject: [PATCH] [ARM] Add Thumb-2 code size optimization regression test for LSR (register). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217582 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/ARM/thumb2-size-opt.ll | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/test/CodeGen/ARM/thumb2-size-opt.ll b/test/CodeGen/ARM/thumb2-size-opt.ll index a6fdbc8c1a2..0084a456a72 100644 --- a/test/CodeGen/ARM/thumb2-size-opt.ll +++ b/test/CodeGen/ARM/thumb2-size-opt.ll @@ -73,3 +73,12 @@ entry: %shr = lshr i32 %a, 13 ret i32 %shr } + +define i32 @lsr-reg(i32 %a, i32 %b) nounwind readnone { +; CHECK-LABEL: "lsr-reg": +; CHECK: lsr.w r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}} @ encoding: [{{0x..,0x..,0x..,0x..}}] +; CHECK-OPT: lsrs r{{[0-7]}}, r{{[0-7]}} @ encoding: [{{0x..,0x..}}] +entry: + %shr = lshr i32 %a, %b + ret i32 %shr +} -- 2.34.1