From c4dbb148ede4e0ed6f376e109032e38e86121f18 Mon Sep 17 00:00:00 2001 From: =?utf8?q?=E9=BB=84=E6=B6=9B?= Date: Sat, 30 Jul 2011 23:09:41 +0800 Subject: [PATCH] Revert "[ARM] Optionally flush entire dcache from v6_dma_flush_range" This reverts commit 3414e45fe081b2f7b89a2156e0b7eec26f77839b. --- arch/arm/mm/cache-v6.S | 17 ----------------- 1 file changed, 17 deletions(-) diff --git a/arch/arm/mm/cache-v6.S b/arch/arm/mm/cache-v6.S index 037cb2dc8cef..295e25dd6381 100644 --- a/arch/arm/mm/cache-v6.S +++ b/arch/arm/mm/cache-v6.S @@ -248,11 +248,6 @@ ENTRY(v6_dma_clean_range) * - end - virtual end address of region */ ENTRY(v6_dma_flush_range) -#ifdef CONFIG_CACHE_FLUSH_RANGE_LIMIT - sub r2, r1, r0 - cmp r2, #CONFIG_CACHE_FLUSH_RANGE_LIMIT - bhi v6_dma_flush_dcache_all -#endif bic r0, r0, #D_CACHE_LINE_SIZE - 1 1: #ifdef HARVARD_CACHE @@ -267,18 +262,6 @@ ENTRY(v6_dma_flush_range) mcr p15, 0, r0, c7, c10, 4 @ drain write buffer mov pc, lr -#ifdef CONFIG_CACHE_FLUSH_RANGE_LIMIT -v6_dma_flush_dcache_all: - mov r0, #0 -#ifdef HARVARD_CACHE - mcr p15, 0, r0, c7, c14, 0 @ D cache clean+invalidate -#else - mcr p15, 0, r0, c7, c15, 0 @ Cache clean+invalidate -#endif - mcr p15, 0, r0, c7, c10, 4 @ drain write buffer - mov pc, lr -#endif - __INITDATA .type v6_cache_fns, #object -- 2.34.1