From c5273ddfecb6d5d8000d55f3e0aa1c93d492dd49 Mon Sep 17 00:00:00 2001 From: Tom Stellard Date: Mon, 4 Jan 2016 20:23:10 +0000 Subject: [PATCH] AMDGPU/SI: Move VI SMEM pattern back into VIInstructions.td Summary: This was accidently moved to CIInstructions.td in r256282 Reviewers: cfang, arsenm Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D15763 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256775 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/AMDGPU/CIInstructions.td | 6 ------ lib/Target/AMDGPU/VIInstructions.td | 9 +++++++++ 2 files changed, 9 insertions(+), 6 deletions(-) diff --git a/lib/Target/AMDGPU/CIInstructions.td b/lib/Target/AMDGPU/CIInstructions.td index 88a090d3df3..b8409a913d1 100644 --- a/lib/Target/AMDGPU/CIInstructions.td +++ b/lib/Target/AMDGPU/CIInstructions.td @@ -329,12 +329,6 @@ def useFlatForGlobal : Predicate < let Predicates = [useFlatForGlobal] in { -// 1. Offset as 20bit DWORD immediate -def : Pat < - (SIload_constant v4i32:$sbase, IMM20bit:$offset), - (S_BUFFER_LOAD_DWORD_IMM $sbase, (as_i32imm $offset)) ->; - // Patterns for global loads with no offset class FlatLoadPat : Pat < (vt (node i64:$addr)), diff --git a/lib/Target/AMDGPU/VIInstructions.td b/lib/Target/AMDGPU/VIInstructions.td index 20a026a822e..1a7801c92bd 100644 --- a/lib/Target/AMDGPU/VIInstructions.td +++ b/lib/Target/AMDGPU/VIInstructions.td @@ -101,3 +101,12 @@ def S_DCACHE_WB_VOL : SMEM_Inval <0x23, } // End SIAssemblerPredicate = DisableInst, SubtargetPredicate = isVI +let Predicates = [isVI] in { + +// 1. Offset as 20bit DWORD immediate +def : Pat < + (SIload_constant v4i32:$sbase, IMM20bit:$offset), + (S_BUFFER_LOAD_DWORD_IMM $sbase, (as_i32imm $offset)) +>; + +} // End Predicates = [isVI] -- 2.34.1