From c8d28890f6c8b769ad8160fa8a701de31f70cfad Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Sun, 23 Oct 2005 22:08:13 +0000 Subject: [PATCH] rearrange things a bit so that instructions can use subtarget features in the future. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23902 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/PowerPC/PPC.td | 20 +++++++++----------- 1 file changed, 9 insertions(+), 11 deletions(-) diff --git a/lib/Target/PowerPC/PPC.td b/lib/Target/PowerPC/PPC.td index 166a98fc13a..da63511bf1b 100644 --- a/lib/Target/PowerPC/PPC.td +++ b/lib/Target/PowerPC/PPC.td @@ -15,16 +15,6 @@ // include "../Target.td" -//===----------------------------------------------------------------------===// -// Register File Description -//===----------------------------------------------------------------------===// - -include "PPCRegisterInfo.td" -include "PPCSchedule.td" -include "PPCInstrInfo.td" - - - //===----------------------------------------------------------------------===// // PowerPC Subtarget features. // @@ -41,7 +31,15 @@ def FeatureFSqrt : SubtargetFeature<"fsqrt", "Enable the fsqrt instruction">; //===----------------------------------------------------------------------===// -// PowerPC chips sets supported. +// Register File Description +//===----------------------------------------------------------------------===// + +include "PPCRegisterInfo.td" +include "PPCSchedule.td" +include "PPCInstrInfo.td" + +//===----------------------------------------------------------------------===// +// PowerPC processors supported. // def : Processor<"generic", G3Itineraries, []>; -- 2.34.1