From c9dfeb1be841045427d71b85e95ac7355b64e8b1 Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Fri, 23 Oct 2009 23:09:19 +0000 Subject: [PATCH] Identity copies should not contribute to spill weight. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84978 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/Target/TargetInstrInfo.h | 25 ++++++++++++++++++++++-- lib/CodeGen/SimpleRegisterCoalescing.cpp | 7 +++++-- 2 files changed, 28 insertions(+), 4 deletions(-) diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h index 919bef1e7f2..d64df445b05 100644 --- a/include/llvm/Target/TargetInstrInfo.h +++ b/include/llvm/Target/TargetInstrInfo.h @@ -133,13 +133,34 @@ private: AliasAnalysis *AA) const; public: - /// Return true if the instruction is a register to register move and return - /// the source and dest operands and their sub-register indices by reference. + /// isMoveInstr - Return true if the instruction is a register to register + /// move and return the source and dest operands and their sub-register + /// indices by reference. virtual bool isMoveInstr(const MachineInstr& MI, unsigned& SrcReg, unsigned& DstReg, unsigned& SrcSubIdx, unsigned& DstSubIdx) const { return false; } + + /// isIdentityCopy - Return true if the instruction is a copy (or + /// extract_subreg, insert_subreg, subreg_to_reg) where the source and + /// destination registers are the same. + bool isIdentityCopy(const MachineInstr &MI) const { + unsigned SrcReg, DstReg, SrcSubIdx, DstSubIdx; + if (isMoveInstr(MI, SrcReg, DstReg, SrcSubIdx, DstSubIdx) && + SrcReg == DstReg) + return true; + + if (MI.getOpcode() == TargetInstrInfo::EXTRACT_SUBREG && + MI.getOperand(0).getReg() == MI.getOperand(1).getReg()) + return true; + + if ((MI.getOpcode() == TargetInstrInfo::INSERT_SUBREG || + MI.getOpcode() == TargetInstrInfo::SUBREG_TO_REG) && + MI.getOperand(0).getReg() == MI.getOperand(2).getReg()) + return true; + return false; + } /// isLoadFromStackSlot - If the specified machine instruction is a direct /// load from a stack slot, return the virtual or physical register number of diff --git a/lib/CodeGen/SimpleRegisterCoalescing.cpp b/lib/CodeGen/SimpleRegisterCoalescing.cpp index 9c283b0f023..827d6dc5f40 100644 --- a/lib/CodeGen/SimpleRegisterCoalescing.cpp +++ b/lib/CodeGen/SimpleRegisterCoalescing.cpp @@ -2556,6 +2556,7 @@ static bool isZeroLengthInterval(LiveInterval *li, LiveIntervals *li_) { return true; } + void SimpleRegisterCoalescing::CalculateSpillWeights() { SmallSet Processed; for (MachineFunction::iterator mbbi = mf_->begin(), mbbe = mf_->end(); @@ -2566,9 +2567,11 @@ void SimpleRegisterCoalescing::CalculateSpillWeights() { unsigned loopDepth = loop ? loop->getLoopDepth() : 0; bool isExit = loop ? loop->isLoopExit(MBB) : false; - for (MachineBasicBlock::iterator mii = MBB->begin(), mie = MBB->end(); + for (MachineBasicBlock::const_iterator mii = MBB->begin(), mie = MBB->end(); mii != mie; ++mii) { - MachineInstr *MI = mii; + const MachineInstr *MI = mii; + if (tii_->isIdentityCopy(*MI)) + continue; for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { const MachineOperand &mopi = MI->getOperand(i); -- 2.34.1