From ca96c8217dc8120554615cbaa12f4adfc1f40ea7 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Fri, 13 May 2005 21:50:27 +0000 Subject: [PATCH] Don't emit SAR X, 0 in the case of sdiv Y, 2 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21986 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86ISelPattern.cpp | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/lib/Target/X86/X86ISelPattern.cpp b/lib/Target/X86/X86ISelPattern.cpp index fcea635d47b..ba3644341cd 100644 --- a/lib/Target/X86/X86ISelPattern.cpp +++ b/lib/Target/X86/X86ISelPattern.cpp @@ -2699,8 +2699,13 @@ unsigned ISel::SelectExpr(SDOperand N) { } unsigned RegSize = MVT::getSizeInBits(N.getValueType()); Tmp1 = SelectExpr(N.getOperand(0)); - unsigned TmpReg = MakeReg(N.getValueType()); - BuildMI(BB, SAROpc, 2, TmpReg).addReg(Tmp1).addImm(Log-1); + unsigned TmpReg; + if (Log != 1) { + TmpReg = MakeReg(N.getValueType()); + BuildMI(BB, SAROpc, 2, TmpReg).addReg(Tmp1).addImm(Log-1); + } else { + TmpReg = Tmp1; + } unsigned TmpReg2 = MakeReg(N.getValueType()); BuildMI(BB, SHROpc, 2, TmpReg2).addReg(TmpReg).addImm(RegSize-Log); unsigned TmpReg3 = MakeReg(N.getValueType()); -- 2.34.1