From cbfa108290944747957d16fc9738a30f96f7e1ee Mon Sep 17 00:00:00 2001 From: Frank Wang Date: Mon, 19 Sep 2016 16:14:25 +0800 Subject: [PATCH] arm64: dts: rockchip: correct usb-controler reference clk for rk3366 We found that the system on rk3366-sdk will crash at the first time after updating the whole firmware, the root cause is the 480m clock from usb-phy has some issues. Since the new usb-phy driver have taken over the 480m clock's maintenance, the clock tree have a bit changes, so related reference clock for usb-controler also need to correct. Change-Id: I54dcc6f416adf61c34df2b9b897e5b58f3b6fed8 Signed-off-by: Frank Wang --- arch/arm64/boot/dts/rockchip/rk3366-tb.dts | 8 ++++---- arch/arm64/boot/dts/rockchip/rk3366.dtsi | 8 ++++---- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3366-tb.dts b/arch/arm64/boot/dts/rockchip/rk3366-tb.dts index 420320c22656..52553e95b64a 100644 --- a/arch/arm64/boot/dts/rockchip/rk3366-tb.dts +++ b/arch/arm64/boot/dts/rockchip/rk3366-tb.dts @@ -264,8 +264,8 @@ ; interrupt-names = "otg_id", "otg_bvalid", "otg_linestate", "host0_linestate"; - clocks = <&cru SCLK_USBPHY480M>; - clock-names = "usbphy_480m"; + clocks = <&cru SCLK_USBPHY480M>, <&cru HCLK_OTG>; + clock-names = "sclk_otgphy0", "otg"; usb_bc { compatible = "inno,phy"; @@ -862,8 +862,8 @@ }; &usb_otg { - clocks = <&cru SCLK_OTG_PHY0>, <&cru HCLK_OTG>; - clock-names = "sclk_otgphy0", "otg"; + clocks = <&cru SCLK_USBPHY480M>, <&cru HCLK_OTG>; + clock-names = "usbphy_480m", "otg"; resets = <&cru SRST_USBOTG_AHB>, <&cru SRST_USBOTG_PHY>, <&cru SRST_USBOTG_CON>; diff --git a/arch/arm64/boot/dts/rockchip/rk3366.dtsi b/arch/arm64/boot/dts/rockchip/rk3366.dtsi index 3ae404c56cd4..749cdf12e67b 100644 --- a/arch/arm64/boot/dts/rockchip/rk3366.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3366.dtsi @@ -479,8 +479,8 @@ compatible = "generic-ehci"; reg = <0x0 0xff480000 0x0 0x20000>; interrupts = ; - clocks = <&cru SCLK_OTG_PHY0>, <&cru HCLK_HOST>; - clock-names = "sclk_otgphy0", "hclk_host0"; + clocks = <&cru SCLK_USBPHY480M>, <&cru HCLK_HOST>; + clock-names = "usbphy_480m", "hclk_host0"; phys = <&u2phy_host>; phy-names = "usb"; status = "disabled"; @@ -490,8 +490,8 @@ compatible = "generic-ohci"; reg = <0x0 0xff4a0000 0x0 0x20000>; interrupts = ; - clocks = <&cru SCLK_OTG_PHY0>, <&cru HCLK_HOST>; - clock-names = "sclk_otgphy0", "hclk_host0"; + clocks = <&cru SCLK_USBPHY480M>, <&cru HCLK_HOST>; + clock-names = "usbphy_480m", "hclk_host0"; status = "disabled"; }; -- 2.34.1