From ccdd70a5c0ac13020a5843b962b5a4bcc9a6559c Mon Sep 17 00:00:00 2001 From: Brian Gaeke Date: Thu, 8 Jul 2004 08:08:10 +0000 Subject: [PATCH] Fix bug involving bool arguments to binary operators. Fix typo in comment. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14684 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Sparc/InstSelectSimple.cpp | 4 ++-- lib/Target/Sparc/SparcV8ISelSimple.cpp | 4 ++-- lib/Target/SparcV8/InstSelectSimple.cpp | 4 ++-- lib/Target/SparcV8/SparcV8ISelSimple.cpp | 4 ++-- 4 files changed, 8 insertions(+), 8 deletions(-) diff --git a/lib/Target/Sparc/InstSelectSimple.cpp b/lib/Target/Sparc/InstSelectSimple.cpp index 43f2646d1e8..527b0bb47a8 100644 --- a/lib/Target/Sparc/InstSelectSimple.cpp +++ b/lib/Target/Sparc/InstSelectSimple.cpp @@ -904,7 +904,7 @@ void V8ISel::visitBinaryOperator (Instruction &I) { BuildMI (BB, Opcodes[OpCase], 2, ResultReg).addReg (Op0Reg).addReg (Op1Reg); } - switch (getClass (I.getType ())) { + switch (getClassB (I.getType ())) { case cByte: if (I.getType ()->isSigned ()) { // add byte BuildMI (BB, V8::ANDri, 2, DestReg).addReg (ResultReg).addZImm (0xff); @@ -926,7 +926,7 @@ void V8ISel::visitBinaryOperator (Instruction &I) { } break; case cInt: - // Nothing todo here. + // Nothing to do here. break; case cLong: // Only support and, or, xor. diff --git a/lib/Target/Sparc/SparcV8ISelSimple.cpp b/lib/Target/Sparc/SparcV8ISelSimple.cpp index 43f2646d1e8..527b0bb47a8 100644 --- a/lib/Target/Sparc/SparcV8ISelSimple.cpp +++ b/lib/Target/Sparc/SparcV8ISelSimple.cpp @@ -904,7 +904,7 @@ void V8ISel::visitBinaryOperator (Instruction &I) { BuildMI (BB, Opcodes[OpCase], 2, ResultReg).addReg (Op0Reg).addReg (Op1Reg); } - switch (getClass (I.getType ())) { + switch (getClassB (I.getType ())) { case cByte: if (I.getType ()->isSigned ()) { // add byte BuildMI (BB, V8::ANDri, 2, DestReg).addReg (ResultReg).addZImm (0xff); @@ -926,7 +926,7 @@ void V8ISel::visitBinaryOperator (Instruction &I) { } break; case cInt: - // Nothing todo here. + // Nothing to do here. break; case cLong: // Only support and, or, xor. diff --git a/lib/Target/SparcV8/InstSelectSimple.cpp b/lib/Target/SparcV8/InstSelectSimple.cpp index 43f2646d1e8..527b0bb47a8 100644 --- a/lib/Target/SparcV8/InstSelectSimple.cpp +++ b/lib/Target/SparcV8/InstSelectSimple.cpp @@ -904,7 +904,7 @@ void V8ISel::visitBinaryOperator (Instruction &I) { BuildMI (BB, Opcodes[OpCase], 2, ResultReg).addReg (Op0Reg).addReg (Op1Reg); } - switch (getClass (I.getType ())) { + switch (getClassB (I.getType ())) { case cByte: if (I.getType ()->isSigned ()) { // add byte BuildMI (BB, V8::ANDri, 2, DestReg).addReg (ResultReg).addZImm (0xff); @@ -926,7 +926,7 @@ void V8ISel::visitBinaryOperator (Instruction &I) { } break; case cInt: - // Nothing todo here. + // Nothing to do here. break; case cLong: // Only support and, or, xor. diff --git a/lib/Target/SparcV8/SparcV8ISelSimple.cpp b/lib/Target/SparcV8/SparcV8ISelSimple.cpp index 43f2646d1e8..527b0bb47a8 100644 --- a/lib/Target/SparcV8/SparcV8ISelSimple.cpp +++ b/lib/Target/SparcV8/SparcV8ISelSimple.cpp @@ -904,7 +904,7 @@ void V8ISel::visitBinaryOperator (Instruction &I) { BuildMI (BB, Opcodes[OpCase], 2, ResultReg).addReg (Op0Reg).addReg (Op1Reg); } - switch (getClass (I.getType ())) { + switch (getClassB (I.getType ())) { case cByte: if (I.getType ()->isSigned ()) { // add byte BuildMI (BB, V8::ANDri, 2, DestReg).addReg (ResultReg).addZImm (0xff); @@ -926,7 +926,7 @@ void V8ISel::visitBinaryOperator (Instruction &I) { } break; case cInt: - // Nothing todo here. + // Nothing to do here. break; case cLong: // Only support and, or, xor. -- 2.34.1