From cd6cea08237522354e1a229980f7b714cae975e9 Mon Sep 17 00:00:00 2001 From: Bill Wendling Date: Tue, 22 May 2007 05:15:37 +0000 Subject: [PATCH] We only need to specify the most-implied feature for an architecture. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37275 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86.td | 54 +++++++++++++++++-------------------------- 1 file changed, 21 insertions(+), 33 deletions(-) diff --git a/lib/Target/X86/X86.td b/lib/Target/X86/X86.td index 89a99a447dd..98362c8d373 100644 --- a/lib/Target/X86/X86.td +++ b/lib/Target/X86/X86.td @@ -41,7 +41,7 @@ def Feature3DNowA : SubtargetFeature<"3dnowa", "X863DNowLevel", "ThreeDNowA", [Feature3DNow]>; def Feature64Bit : SubtargetFeature<"64bit", "HasX86_64", "true", "Support 64-bit instructions", - [FeatureMMX, FeatureSSE1, FeatureSSE2]>; + [FeatureSSE2]>; //===----------------------------------------------------------------------===// // X86 processors supported. @@ -58,44 +58,32 @@ def : Proc<"pentium-mmx", [FeatureMMX]>; def : Proc<"i686", []>; def : Proc<"pentiumpro", []>; def : Proc<"pentium2", [FeatureMMX]>; -def : Proc<"pentium3", [FeatureMMX, FeatureSSE1]>; -def : Proc<"pentium-m", [FeatureMMX, FeatureSSE1, FeatureSSE2]>; -def : Proc<"pentium4", [FeatureMMX, FeatureSSE1, FeatureSSE2]>; -def : Proc<"x86-64", [FeatureMMX, FeatureSSE1, FeatureSSE2, - Feature64Bit]>; -def : Proc<"yonah", [FeatureMMX, FeatureSSE1, FeatureSSE2, - FeatureSSE3]>; -def : Proc<"prescott", [FeatureMMX, FeatureSSE1, FeatureSSE2, - FeatureSSE3]>; -def : Proc<"nocona", [FeatureMMX, FeatureSSE1, FeatureSSE2, - FeatureSSE3, Feature64Bit]>; -def : Proc<"core2", [FeatureMMX, FeatureSSE1, FeatureSSE2, - FeatureSSE3, FeatureSSSE3, Feature64Bit]>; +def : Proc<"pentium3", [FeatureSSE1]>; +def : Proc<"pentium-m", [FeatureSSE2]>; +def : Proc<"pentium4", [FeatureSSE2]>; +def : Proc<"x86-64", [Feature64Bit]>; +def : Proc<"yonah", [FeatureSSE3]>; +def : Proc<"prescott", [FeatureSSE3]>; +def : Proc<"nocona", [FeatureSSE3]>; +def : Proc<"core2", [FeatureSSSE3]>; def : Proc<"k6", [FeatureMMX]>; -def : Proc<"k6-2", [FeatureMMX, Feature3DNow]>; -def : Proc<"k6-3", [FeatureMMX, Feature3DNow]>; -def : Proc<"athlon", [FeatureMMX, Feature3DNow, Feature3DNowA]>; -def : Proc<"athlon-tbird", [FeatureMMX, Feature3DNow, Feature3DNowA]>; -def : Proc<"athlon-4", [FeatureMMX, FeatureSSE1, Feature3DNow, - Feature3DNowA]>; -def : Proc<"athlon-xp", [FeatureMMX, FeatureSSE1, Feature3DNow, - Feature3DNowA]>; -def : Proc<"athlon-mp", [FeatureMMX, FeatureSSE1, Feature3DNow, - Feature3DNowA]>; -def : Proc<"k8", [FeatureMMX, FeatureSSE1, FeatureSSE2, - Feature3DNow, Feature3DNowA, Feature64Bit]>; -def : Proc<"opteron", [FeatureMMX, FeatureSSE1, FeatureSSE2, - Feature3DNow, Feature3DNowA, Feature64Bit]>; -def : Proc<"athlon64", [FeatureMMX, FeatureSSE1, FeatureSSE2, - Feature3DNow, Feature3DNowA, Feature64Bit]>; -def : Proc<"athlon-fx", [FeatureMMX, FeatureSSE1, FeatureSSE2, - Feature3DNow, Feature3DNowA, Feature64Bit]>; +def : Proc<"k6-2", [FeatureMMX, Feature3DNow]>; +def : Proc<"k6-3", [FeatureMMX, Feature3DNow]>; +def : Proc<"athlon", [FeatureMMX, Feature3DNowA]>; +def : Proc<"athlon-tbird", [FeatureMMX, Feature3DNowA]>; +def : Proc<"athlon-4", [FeatureSSE1, Feature3DNowA]>; +def : Proc<"athlon-xp", [FeatureSSE1, Feature3DNowA]>; +def : Proc<"athlon-mp", [FeatureSSE1, Feature3DNowA]>; +def : Proc<"k8", [Feature3DNowA, Feature64Bit]>; +def : Proc<"opteron", [Feature3DNowA, Feature64Bit]>; +def : Proc<"athlon64", [Feature3DNowA, Feature64Bit]>; +def : Proc<"athlon-fx", [Feature3DNowA, Feature64Bit]>; def : Proc<"winchip-c6", [FeatureMMX]>; def : Proc<"winchip2", [FeatureMMX, Feature3DNow]>; def : Proc<"c3", [FeatureMMX, Feature3DNow]>; -def : Proc<"c3-2", [FeatureMMX, FeatureSSE1]>; +def : Proc<"c3-2", [FeatureSSE1]>; //===----------------------------------------------------------------------===// // Register File Description -- 2.34.1