From cdddfe0cb3651aa8109b0d827103399f9e0b53bb Mon Sep 17 00:00:00 2001 From: Cameron McInally Date: Mon, 16 Feb 2015 22:15:42 +0000 Subject: [PATCH] [AVX512] Make 512b vector floating point rounds legal on AVX512. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229445 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86ISelLowering.cpp | 11 ++++ test/CodeGen/X86/avx512-round.ll | 81 ++++++++++++++++++++++++++++++ 2 files changed, 92 insertions(+) create mode 100644 test/CodeGen/X86/avx512-round.ll diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 6b3b73b60f2..70bb7d2f337 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -1475,6 +1475,17 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM, setOperationAction(ISD::SIGN_EXTEND, MVT::v8i16, Custom); setOperationAction(ISD::SIGN_EXTEND, MVT::v16i16, Custom); + setOperationAction(ISD::FFLOOR, MVT::v16f32, Legal); + setOperationAction(ISD::FFLOOR, MVT::v8f64, Legal); + setOperationAction(ISD::FCEIL, MVT::v16f32, Legal); + setOperationAction(ISD::FCEIL, MVT::v8f64, Legal); + setOperationAction(ISD::FTRUNC, MVT::v16f32, Legal); + setOperationAction(ISD::FTRUNC, MVT::v8f64, Legal); + setOperationAction(ISD::FRINT, MVT::v16f32, Legal); + setOperationAction(ISD::FRINT, MVT::v8f64, Legal); + setOperationAction(ISD::FNEARBYINT, MVT::v16f32, Legal); + setOperationAction(ISD::FNEARBYINT, MVT::v8f64, Legal); + setOperationAction(ISD::CONCAT_VECTORS, MVT::v8f64, Custom); setOperationAction(ISD::CONCAT_VECTORS, MVT::v8i64, Custom); setOperationAction(ISD::CONCAT_VECTORS, MVT::v16f32, Custom); diff --git a/test/CodeGen/X86/avx512-round.ll b/test/CodeGen/X86/avx512-round.ll new file mode 100644 index 00000000000..19d9f18b80a --- /dev/null +++ b/test/CodeGen/X86/avx512-round.ll @@ -0,0 +1,81 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl --show-mc-encoding| FileCheck %s + +define <16 x float> @floor_v16f32(<16 x float> %a) { +; CHECK-LABEL: floor_v16f32 +; CHECK: vrndscaleps $1, {{.*}}encoding: [0x62,0xf3,0x7d,0x48,0x08,0xc0,0x01] + %res = call <16 x float> @llvm.floor.v16f32(<16 x float> %a) + ret <16 x float> %res +} +declare <16 x float> @llvm.floor.v16f32(<16 x float> %p) + +define <8 x double> @floor_v8f64(<8 x double> %a) { +; CHECK-LABEL: floor_v8f64 +; CHECK: vrndscalepd $1, {{.*}}encoding: [0x62,0xf3,0xfd,0x48,0x09,0xc0,0x01] + %res = call <8 x double> @llvm.floor.v8f64(<8 x double> %a) + ret <8 x double> %res +} +declare <8 x double> @llvm.floor.v8f64(<8 x double> %p) + +define <16 x float> @ceil_v16f32(<16 x float> %a) { +; CHECK-LABEL: ceil_v16f32 +; CHECK: vrndscaleps $2, {{.*}}encoding: [0x62,0xf3,0x7d,0x48,0x08,0xc0,0x02] + %res = call <16 x float> @llvm.ceil.v16f32(<16 x float> %a) + ret <16 x float> %res +} +declare <16 x float> @llvm.ceil.v16f32(<16 x float> %p) + +define <8 x double> @ceil_v8f64(<8 x double> %a) { +; CHECK-LABEL: ceil_v8f64 +; CHECK: vrndscalepd $2, {{.*}}encoding: [0x62,0xf3,0xfd,0x48,0x09,0xc0,0x02] + %res = call <8 x double> @llvm.ceil.v8f64(<8 x double> %a) + ret <8 x double> %res +} +declare <8 x double> @llvm.ceil.v8f64(<8 x double> %p) + +define <16 x float> @trunc_v16f32(<16 x float> %a) { +; CHECK-LABEL: trunc_v16f32 +; CHECK: vrndscaleps $3, {{.*}}encoding: [0x62,0xf3,0x7d,0x48,0x08,0xc0,0x03] + %res = call <16 x float> @llvm.trunc.v16f32(<16 x float> %a) + ret <16 x float> %res +} +declare <16 x float> @llvm.trunc.v16f32(<16 x float> %p) + +define <8 x double> @trunc_v8f64(<8 x double> %a) { +; CHECK-LABEL: trunc_v8f64 +; CHECK: vrndscalepd $3, {{.*}}encoding: [0x62,0xf3,0xfd,0x48,0x09,0xc0,0x03] + %res = call <8 x double> @llvm.trunc.v8f64(<8 x double> %a) + ret <8 x double> %res +} +declare <8 x double> @llvm.trunc.v8f64(<8 x double> %p) + +define <16 x float> @rint_v16f32(<16 x float> %a) { +; CHECK-LABEL: rint_v16f32 +; CHECK: vrndscaleps $4, {{.*}}encoding: [0x62,0xf3,0x7d,0x48,0x08,0xc0,0x04] + %res = call <16 x float> @llvm.rint.v16f32(<16 x float> %a) + ret <16 x float> %res +} +declare <16 x float> @llvm.rint.v16f32(<16 x float> %p) + +define <8 x double> @rint_v8f64(<8 x double> %a) { +; CHECK-LABEL: rint_v8f64 +; CHECK: vrndscalepd $4, {{.*}}encoding: [0x62,0xf3,0xfd,0x48,0x09,0xc0,0x04] + %res = call <8 x double> @llvm.rint.v8f64(<8 x double> %a) + ret <8 x double> %res +} +declare <8 x double> @llvm.rint.v8f64(<8 x double> %p) + +define <16 x float> @nearbyint_v16f32(<16 x float> %a) { +; CHECK-LABEL: nearbyint_v16f32 +; CHECK: vrndscaleps $12, {{.*}}encoding: [0x62,0xf3,0x7d,0x48,0x08,0xc0,0x0c] + %res = call <16 x float> @llvm.nearbyint.v16f32(<16 x float> %a) + ret <16 x float> %res +} +declare <16 x float> @llvm.nearbyint.v16f32(<16 x float> %p) + +define <8 x double> @nearbyint_v8f64(<8 x double> %a) { +; CHECK-LABEL: nearbyint_v8f64 +; CHECK: vrndscalepd $12, {{.*}}encoding: [0x62,0xf3,0xfd,0x48,0x09,0xc0,0x0c] + %res = call <8 x double> @llvm.nearbyint.v8f64(<8 x double> %a) + ret <8 x double> %res +} +declare <8 x double> @llvm.nearbyint.v8f64(<8 x double> %p) -- 2.34.1