From cdfde8c3752bdabea6dd4e8dde113d5eeb5d8b92 Mon Sep 17 00:00:00 2001 From: yangkai Date: Tue, 31 Jul 2012 17:51:05 +0800 Subject: [PATCH] usb code modify --- drivers/usb/dwc_otg/dwc_otg_driver.c | 16 ++-------------- drivers/usb/dwc_otg/dwc_otg_hcd.c | 4 ++-- drivers/usb/dwc_otg/dwc_otg_pcd.c | 1 + 3 files changed, 5 insertions(+), 16 deletions(-) diff --git a/drivers/usb/dwc_otg/dwc_otg_driver.c b/drivers/usb/dwc_otg/dwc_otg_driver.c index 84c360d55af3..d802e279674f 100755 --- a/drivers/usb/dwc_otg/dwc_otg_driver.c +++ b/drivers/usb/dwc_otg/dwc_otg_driver.c @@ -74,7 +74,7 @@ #include "dwc_otg_cil.h" #include "dwc_otg_pcd.h" #include "dwc_otg_hcd.h" -#include +//#include //#define DWC_DRIVER_VERSION "2.60a 22-NOV-2006" //#define DWC_DRIVER_VERSION "2.70 2009-12-31" #define DWC_DRIVER_VERSION "3.00 2010-12-12 rockchip" @@ -1416,7 +1416,7 @@ static __devinit int dwc_otg_driver_probe(struct platform_device *pdev) dwc_otg_device->phyclk = phyclk; dwc_otg_device->ahbclk = ahbclk; #endif -#ifdef CONFIG_ARCH_RK2928 +#if 0//def CONFIG_ARCH_RK2928 otg_phy_con = (unsigned int*)(USBGRF_UOC0_CON5); cru_set_soft_reset(SOFT_RST_USBPHY0, true); cru_set_soft_reset(SOFT_RST_OTGC0, true); @@ -2176,9 +2176,6 @@ static __devinit int host20_driver_probe(struct platform_device *pdev) #ifdef CONFIG_ARCH_RK30 *(unsigned int*)(USBGRF_UOC1_CON2+4) = ((1<<5)|((1<<5)<<16)); #endif -#ifdef CONFIG_ARCH_RK2928 - *(unsigned int*)(USBGRF_UOC1_CON5-4) = ((1<<5)|((1<<5)<<16)); -#endif if (dwc_otg_device == 0) { dev_err(dev, "kmalloc of dwc_otg_device failed\n"); @@ -2311,15 +2308,6 @@ static __devinit int host20_driver_probe(struct platform_device *pdev) #endif #ifdef CONFIG_ARCH_RK30 USB_IOMUX_INIT(GPIO0A6_HOSTDRVVBUS_NAME, GPIO0A_HOST_DRV_VBUS); -#ifdef CONFIG_MACH_RK30_DS1001B - USB_IOMUX_INIT(GPIO0A5_OTGDRVVBUS_NAME, GPIO0A_GPIO0A5); - if(gpio_request(RK30_PIN0_PA5,"host_drv")<0){ - DWC_ERROR("request of host power control failed\n"); - gpio_free(RK30_PIN0_PA5); - } - gpio_direction_output(RK30_PIN0_PA5, GPIO_HIGH); - gpio_set_value(RK30_PIN0_PA5, GPIO_HIGH); -#endif #endif /* * Initialize the DWC_otg core. diff --git a/drivers/usb/dwc_otg/dwc_otg_hcd.c b/drivers/usb/dwc_otg/dwc_otg_hcd.c index 4c84033c2a59..55a1e8931f54 100755 --- a/drivers/usb/dwc_otg/dwc_otg_hcd.c +++ b/drivers/usb/dwc_otg/dwc_otg_hcd.c @@ -618,7 +618,7 @@ static int32_t dwc_otg_phy_suspend_cb( void *_p, int suspend) DWC_DEBUGPL(DBG_PCDV, "disable usb phy\n"); } #endif -#ifdef CONFIG_ARCH_RK2928 +#if 0//def CONFIG_ARCH_RK2928 unsigned int * otg_phy_con1 = (unsigned int*)(USBGRF_UOC0_CON5); if(exitsuspend && (pcd->phy_suspend == 1)) { clk_enable(pcd->otg_dev->ahbclk); @@ -1143,7 +1143,7 @@ static int32_t host20_phy_suspend_cb( void *_p, int suspend) DWC_DEBUGPL(DBG_PCDV, "disable usb phy\n"); } #endif -#ifdef CONFIG_ARCH_RK2928 +#if 0//def CONFIG_ARCH_RK2928 unsigned int * otg_phy_con1 = (unsigned int*)(USBGRF_UOC0_CON5); if(exitsuspend && (pcd->phy_suspend == 1)) { clk_enable(pcd->otg_dev->ahbclk); diff --git a/drivers/usb/dwc_otg/dwc_otg_pcd.c b/drivers/usb/dwc_otg/dwc_otg_pcd.c index 8dd5bce818c5..5b962bf8657e 100755 --- a/drivers/usb/dwc_otg/dwc_otg_pcd.c +++ b/drivers/usb/dwc_otg/dwc_otg_pcd.c @@ -1604,6 +1604,7 @@ int dwc_pcd_reset(dwc_otg_pcd_t *pcd) cru_set_soft_reset(SOFT_RST_USB_OTG_2_0_AHB_BUS, false); cru_set_soft_reset(SOFT_RST_USB_OTG_2_0_PHY, false); cru_set_soft_reset(SOFT_RST_USB_OTG_2_0_CONTROLLER, false); + mdelay(1); #endif //rockchip_scu_reset_unit(12); dwc_otg_pcd_reinit( pcd ); -- 2.34.1