From cea117d2de0bfe422641e2ada4fef160e099a6b4 Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Tue, 30 Jan 2007 02:35:32 +0000 Subject: [PATCH] Change the operand orders to t_addrmode_s* to make it easier to morph instructions that use these address modes to instructions that use t_addrmode_sp. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33651 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMAsmPrinter.cpp | 22 ++++++++-------------- lib/Target/ARM/ARMISelDAGToDAG.cpp | 30 +++++++++++++++--------------- lib/Target/ARM/ARMInstrThumb.td | 6 +++--- 3 files changed, 26 insertions(+), 32 deletions(-) diff --git a/lib/Target/ARM/ARMAsmPrinter.cpp b/lib/Target/ARM/ARMAsmPrinter.cpp index 7e95c9c36ad..b73c4109e5f 100644 --- a/lib/Target/ARM/ARMAsmPrinter.cpp +++ b/lib/Target/ARM/ARMAsmPrinter.cpp @@ -523,7 +523,8 @@ void ARMAsmPrinter::printThumbAddrModeRI5Operand(const MachineInstr *MI, int Op, unsigned Scale) { const MachineOperand &MO1 = MI->getOperand(Op); - const MachineOperand &MO2 = MI->getOperand(Op+2); + const MachineOperand &MO2 = MI->getOperand(Op+1); + const MachineOperand &MO3 = MI->getOperand(Op+2); if (!MO1.isRegister()) { // FIXME: This is for CP entries, but isn't right. printOperand(MI, Op); @@ -531,7 +532,9 @@ ARMAsmPrinter::printThumbAddrModeRI5Operand(const MachineInstr *MI, int Op, } O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).Name; - if (unsigned ImmOffs = MO2.getImm()) { + if (MO3.getReg()) + O << ", " << TM.getRegisterInfo()->get(MO3.getReg()).Name; + else if (unsigned ImmOffs = MO2.getImm()) { O << ", #" << ImmOffs; if (Scale > 1) O << " * " << Scale; @@ -541,24 +544,15 @@ ARMAsmPrinter::printThumbAddrModeRI5Operand(const MachineInstr *MI, int Op, void ARMAsmPrinter::printThumbAddrModeS1Operand(const MachineInstr *MI, int Op) { - if (MI->getOperand(Op+1).getReg()) - printThumbAddrModeRROperand(MI, Op); - else - printThumbAddrModeRI5Operand(MI, Op, 1); + printThumbAddrModeRI5Operand(MI, Op, 1); } void ARMAsmPrinter::printThumbAddrModeS2Operand(const MachineInstr *MI, int Op) { - if (MI->getOperand(Op+1).getReg()) - printThumbAddrModeRROperand(MI, Op); - else - printThumbAddrModeRI5Operand(MI, Op, 2); + printThumbAddrModeRI5Operand(MI, Op, 2); } void ARMAsmPrinter::printThumbAddrModeS4Operand(const MachineInstr *MI, int Op) { - if (MI->getOperand(Op+1).getReg()) - printThumbAddrModeRROperand(MI, Op); - else - printThumbAddrModeRI5Operand(MI, Op, 4); + printThumbAddrModeRI5Operand(MI, Op, 4); } void ARMAsmPrinter::printThumbAddrModeSPOperand(const MachineInstr *MI,int Op) { diff --git a/lib/Target/ARM/ARMISelDAGToDAG.cpp b/lib/Target/ARM/ARMISelDAGToDAG.cpp index 4c6fce6efa5..262c856dd10 100644 --- a/lib/Target/ARM/ARMISelDAGToDAG.cpp +++ b/lib/Target/ARM/ARMISelDAGToDAG.cpp @@ -72,14 +72,14 @@ public: bool SelectThumbAddrModeRR(SDOperand Op, SDOperand N, SDOperand &Base, SDOperand &Offset); bool SelectThumbAddrModeRI5(SDOperand Op, SDOperand N, unsigned Scale, - SDOperand &Base, SDOperand &Offset, - SDOperand &OffImm); + SDOperand &Base, SDOperand &OffImm, + SDOperand &Offset); bool SelectThumbAddrModeS1(SDOperand Op, SDOperand N, SDOperand &Base, - SDOperand &Offset, SDOperand &OffImm); + SDOperand &OffImm, SDOperand &Offset); bool SelectThumbAddrModeS2(SDOperand Op, SDOperand N, SDOperand &Base, - SDOperand &Offset, SDOperand &OffImm); + SDOperand &OffImm, SDOperand &Offset); bool SelectThumbAddrModeS4(SDOperand Op, SDOperand N, SDOperand &Base, - SDOperand &Offset, SDOperand &OffImm); + SDOperand &OffImm, SDOperand &Offset); bool SelectThumbAddrModeSP(SDOperand Op, SDOperand N, SDOperand &Base, SDOperand &OffImm); @@ -375,7 +375,7 @@ bool ARMDAGToDAGISel::SelectThumbAddrModeRR(SDOperand Op, SDOperand N, bool ARMDAGToDAGISel::SelectThumbAddrModeRI5(SDOperand Op, SDOperand N, unsigned Scale, SDOperand &Base, - SDOperand &Offset, SDOperand &OffImm) { + SDOperand &OffImm, SDOperand &Offset) { if (Scale == 4) { SDOperand TmpBase, TmpOffImm; if (SelectThumbAddrModeSP(Op, N, TmpBase, TmpOffImm)) @@ -413,21 +413,21 @@ ARMDAGToDAGISel::SelectThumbAddrModeRI5(SDOperand Op, SDOperand N, } bool ARMDAGToDAGISel::SelectThumbAddrModeS1(SDOperand Op, SDOperand N, - SDOperand &Base, SDOperand &Offset, - SDOperand &OffImm) { - return SelectThumbAddrModeRI5(Op, N, 1, Base, Offset, OffImm); + SDOperand &Base, SDOperand &OffImm, + SDOperand &Offset) { + return SelectThumbAddrModeRI5(Op, N, 1, Base, OffImm, Offset); } bool ARMDAGToDAGISel::SelectThumbAddrModeS2(SDOperand Op, SDOperand N, - SDOperand &Base, SDOperand &Offset, - SDOperand &OffImm) { - return SelectThumbAddrModeRI5(Op, N, 2, Base, Offset, OffImm); + SDOperand &Base, SDOperand &OffImm, + SDOperand &Offset) { + return SelectThumbAddrModeRI5(Op, N, 2, Base, OffImm, Offset); } bool ARMDAGToDAGISel::SelectThumbAddrModeS4(SDOperand Op, SDOperand N, - SDOperand &Base, SDOperand &Offset, - SDOperand &OffImm) { - return SelectThumbAddrModeRI5(Op, N, 4, Base, Offset, OffImm); + SDOperand &Base, SDOperand &OffImm, + SDOperand &Offset) { + return SelectThumbAddrModeRI5(Op, N, 4, Base, OffImm, Offset); } bool ARMDAGToDAGISel::SelectThumbAddrModeSP(SDOperand Op, SDOperand N, diff --git a/lib/Target/ARM/ARMInstrThumb.td b/lib/Target/ARM/ARMInstrThumb.td index b99569d4a00..f806754fd5a 100644 --- a/lib/Target/ARM/ARMInstrThumb.td +++ b/lib/Target/ARM/ARMInstrThumb.td @@ -124,7 +124,7 @@ def t_addrmode_rr : Operand, def t_addrmode_s4 : Operand, ComplexPattern { let PrintMethod = "printThumbAddrModeS4Operand"; - let MIOperandInfo = (ops GPR:$base, GPR:$offsreg, i32imm:$offsimm); + let MIOperandInfo = (ops GPR:$base, i32imm:$offsimm, GPR:$offsreg); } // t_addrmode_s2 := reg + reg @@ -133,7 +133,7 @@ def t_addrmode_s4 : Operand, def t_addrmode_s2 : Operand, ComplexPattern { let PrintMethod = "printThumbAddrModeS2Operand"; - let MIOperandInfo = (ops GPR:$base, GPR:$offsreg, i32imm:$offsimm); + let MIOperandInfo = (ops GPR:$base, i32imm:$offsimm, GPR:$offsreg); } // t_addrmode_s1 := reg + reg @@ -142,7 +142,7 @@ def t_addrmode_s2 : Operand, def t_addrmode_s1 : Operand, ComplexPattern { let PrintMethod = "printThumbAddrModeS1Operand"; - let MIOperandInfo = (ops GPR:$base, GPR:$offsreg, i32imm:$offsimm); + let MIOperandInfo = (ops GPR:$base, i32imm:$offsimm, GPR:$offsreg); } // t_addrmode_sp := sp + imm8 * 4 -- 2.34.1