From d1a4be5e640aad647e5b0a758b6cba6987a0f0ca Mon Sep 17 00:00:00 2001 From: Marc Zyngier Date: Fri, 20 Jan 2012 12:24:47 +0100 Subject: [PATCH] ARM: 7297/1: smp_twd: make sure timer is stopped before registering it On secondary CPUs, the Timer Control Register is not reset to a sane value before the timer is registered, and the TRM doesn't seem to indicate any reset value either. In some cases, the kernel will take an interrupt too early, depending on what junk was present in the registers at reset time. The fix is to set the Timer Control Register to 0 before registering the clock_event_device and enabling the interrupt. Problem seen on VE (Cortex A5) and Tegra. Signed-off-by: Marc Zyngier Signed-off-by: Russell King --- arch/arm/kernel/smp_twd.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c index 5d9e308a0909..82347d53a877 100644 --- a/arch/arm/kernel/smp_twd.c +++ b/arch/arm/kernel/smp_twd.c @@ -183,6 +183,8 @@ void __cpuinit twd_timer_setup(struct clock_event_device *clk) else twd_calibrate_rate(); + __raw_writel(0, twd_base + TWD_TIMER_CONTROL); + clk->name = "local_timer"; clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_C3STOP; -- 2.34.1