From d1b0795570e33fbee97e1fb7200aaacacf89905b Mon Sep 17 00:00:00 2001 From: Eric Christopher Date: Sat, 14 Nov 2015 03:04:00 +0000 Subject: [PATCH] Add MMX to the 3dnow enum and propagate changes around. This makes it somewhat more consistent with how the feature is used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253122 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86.td | 11 +++++------ lib/Target/X86/X86Subtarget.cpp | 1 - lib/Target/X86/X86Subtarget.h | 9 +++------ 3 files changed, 8 insertions(+), 13 deletions(-) diff --git a/lib/Target/X86/X86.td b/lib/Target/X86/X86.td index 0c55d01d775..7d9f396c1e9 100644 --- a/lib/Target/X86/X86.td +++ b/lib/Target/X86/X86.td @@ -52,12 +52,6 @@ def FeatureXSAVEC : SubtargetFeature<"xsavec", "HasXSAVEC", "true", def FeatureXSAVES : SubtargetFeature<"xsaves", "HasXSAVES", "true", "Support xsaves instructions">; -// The MMX subtarget feature is separate from the rest of the SSE features -// because it's important (for odd compatibility reasons) to be able to -// turn it off explicitly while allowing SSE+ to be on. -def FeatureMMX : SubtargetFeature<"mmx","HasMMX", "true", - "Enable MMX instructions">; - def FeatureSSE1 : SubtargetFeature<"sse", "X86SSELevel", "SSE1", "Enable SSE instructions", // SSE codegen depends on cmovs, and all @@ -78,6 +72,11 @@ def FeatureSSE41 : SubtargetFeature<"sse4.1", "X86SSELevel", "SSE41", def FeatureSSE42 : SubtargetFeature<"sse4.2", "X86SSELevel", "SSE42", "Enable SSE 4.2 instructions", [FeatureSSE41]>; +// The MMX subtarget feature is separate from the rest of the SSE features +// because it's important (for odd compatibility reasons) to be able to +// turn it off explicitly while allowing SSE+ to be on. +def FeatureMMX : SubtargetFeature<"mmx","X863DNowLevel", "MMX", + "Enable MMX instructions">; def Feature3DNow : SubtargetFeature<"3dnow", "X863DNowLevel", "ThreeDNow", "Enable 3DNow! instructions", [FeatureMMX]>; diff --git a/lib/Target/X86/X86Subtarget.cpp b/lib/Target/X86/X86Subtarget.cpp index ad593f4be2e..44a46b7e07a 100644 --- a/lib/Target/X86/X86Subtarget.cpp +++ b/lib/Target/X86/X86Subtarget.cpp @@ -231,7 +231,6 @@ void X86Subtarget::initializeEnvironment() { X86SSELevel = NoSSE; X863DNowLevel = NoThreeDNow; HasCMov = false; - HasMMX = false; HasX86_64 = false; HasPOPCNT = false; HasSSE4A = false; diff --git a/lib/Target/X86/X86Subtarget.h b/lib/Target/X86/X86Subtarget.h index 85d4d1ae404..425bc2482e9 100644 --- a/lib/Target/X86/X86Subtarget.h +++ b/lib/Target/X86/X86Subtarget.h @@ -51,7 +51,7 @@ protected: }; enum X863DNowEnum { - NoThreeDNow, ThreeDNow, ThreeDNowA + NoThreeDNow, MMX, ThreeDNow, ThreeDNowA }; enum X86ProcFamilyEnum { @@ -67,16 +67,13 @@ protected: /// SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, or none supported. X86SSEEnum X86SSELevel; - /// 3DNow, 3DNow Athlon, or none supported. + /// MMX, 3DNow, 3DNow Athlon, or none supported. X863DNowEnum X863DNowLevel; /// True if this processor has conditional move instructions /// (generally pentium pro+). bool HasCMov; - /// True if this processor supports MMX instructions. - bool HasMMX; - /// True if the processor supports X86-64 instructions. bool HasX86_64; @@ -334,7 +331,6 @@ public: void setPICStyle(PICStyles::Style Style) { PICStyle = Style; } bool hasCMov() const { return HasCMov; } - bool hasMMX() const { return HasMMX; } bool hasSSE1() const { return X86SSELevel >= SSE1; } bool hasSSE2() const { return X86SSELevel >= SSE2; } bool hasSSE3() const { return X86SSELevel >= SSE3; } @@ -347,6 +343,7 @@ public: bool hasFp256() const { return hasAVX(); } bool hasInt256() const { return hasAVX2(); } bool hasSSE4A() const { return HasSSE4A; } + bool hasMMX() const { return X863DNowLevel >= MMX; } bool has3DNow() const { return X863DNowLevel >= ThreeDNow; } bool has3DNowA() const { return X863DNowLevel >= ThreeDNowA; } bool hasPOPCNT() const { return HasPOPCNT; } -- 2.34.1