From d1d5fd00f5ab78c5c5edc9f0f7529ce0408244d3 Mon Sep 17 00:00:00 2001 From: =?utf8?q?=E9=BB=84=E6=B6=9B?= Date: Fri, 10 Dec 2010 16:34:24 +0800 Subject: [PATCH] rk29: timer: use periph sync timer --- arch/arm/mach-rk29/io.c | 2 ++ arch/arm/mach-rk29/timer.c | 26 ++++++++++++++++++++++++++ 2 files changed, 28 insertions(+) diff --git a/arch/arm/mach-rk29/io.c b/arch/arm/mach-rk29/io.c index a56d8894267a..c669bef19fd6 100644 --- a/arch/arm/mach-rk29/io.c +++ b/arch/arm/mach-rk29/io.c @@ -34,6 +34,8 @@ static struct map_desc rk29_io_desc[] __initdata = { RK29_DEVICE(GICPERI), RK29_DEVICE(TIMER0), RK29_DEVICE(TIMER1), + RK29_DEVICE(TIMER2), + RK29_DEVICE(TIMER3), RK29_DEVICE(DDRC), RK29_DEVICE(UART1), RK29_DEVICE(PWM), diff --git a/arch/arm/mach-rk29/timer.c b/arch/arm/mach-rk29/timer.c index 8debd38050f9..501d820668ab 100644 --- a/arch/arm/mach-rk29/timer.c +++ b/arch/arm/mach-rk29/timer.c @@ -34,6 +34,30 @@ #define TIMER_ENABLE 3 #define TIMER_ENABLE_FREE_RUNNING 1 +#if 1 /* by default, use periph sync timer */ + +#define RK_TIMER_ENABLE(n) writel(TIMER_ENABLE, RK29_TIMER2_BASE + 0x4000 * (n - 2) + TIMER_CONTROL_REG) +#define RK_TIMER_ENABLE_FREE_RUNNING(n) writel(TIMER_ENABLE_FREE_RUNNING, RK29_TIMER2_BASE + 0x4000 * (n - 2) + TIMER_CONTROL_REG) +#define RK_TIMER_DISABLE(n) writel(TIMER_DISABLE, RK29_TIMER2_BASE + 0x4000 * (n - 2) + TIMER_CONTROL_REG) + +#define RK_TIMER_SETCOUNT(n, count) writel(count, RK29_TIMER2_BASE + 0x4000 * (n - 2) + TIMER_LOAD_COUNT) +#define RK_TIMER_GETCOUNT(n) readl(RK29_TIMER2_BASE + 0x4000 * (n - 2) + TIMER_LOAD_COUNT) + +#define RK_TIMER_READVALUE(n) readl(RK29_TIMER2_BASE + 0x4000 * (n - 2) + TIMER_CUR_VALUE) +#define RK_TIMER_INT_CLEAR(n) readl(RK29_TIMER2_BASE + 0x4000 * (n - 2) + TIMER_EOI) + +#define RK_TIMER_INT_STATUS(n) readl(RK29_TIMER2_BASE + 0x4000 * (n - 2) + TIMER_INT_STATUS) + +#define TIMER_CLKEVT 2 /* timer2 */ +#define IRQ_NR_TIMER_CLKEVT IRQ_TIMER2 +#define TIMER_CLKEVT_NAME "timer2" + +#define TIMER_CLKSRC 3 /* timer3 */ +#define IRQ_NR_TIMER_CLKSRC IRQ_TIMER3 +#define TIMER_CLKSRC_NAME "timer3" + +#else + #define RK_TIMER_ENABLE(n) writel(TIMER_ENABLE, RK29_TIMER0_BASE + 0x2000 * n + TIMER_CONTROL_REG) #define RK_TIMER_ENABLE_FREE_RUNNING(n) writel(TIMER_ENABLE_FREE_RUNNING, RK29_TIMER0_BASE + 0x2000 * n + TIMER_CONTROL_REG) #define RK_TIMER_DISABLE(n) writel(TIMER_DISABLE, RK29_TIMER0_BASE + 0x2000 * n + TIMER_CONTROL_REG) @@ -54,6 +78,8 @@ #define IRQ_NR_TIMER_CLKSRC IRQ_TIMER1 #define TIMER_CLKSRC_NAME "timer1" +#endif + static int rk29_timer_set_next_event(unsigned long cycles, struct clock_event_device *evt) { do { -- 2.34.1