From d311051513a772d67ebf7f8db140d7d5c6e87237 Mon Sep 17 00:00:00 2001 From: Zoran Jovanovic Date: Wed, 22 Apr 2015 13:27:34 +0000 Subject: [PATCH] [mips][microMIPSr6] Implement mips32 to microMIPSr6 mapping support Differential Revision: http://reviews.llvm.org/D8661 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235505 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp | 13 ++++++++++--- lib/Target/Mips/MipsInstrFormats.td | 14 ++++++++++++++ 2 files changed, 24 insertions(+), 3 deletions(-) diff --git a/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp b/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp index 9c2508ff983..0cb8d553984 100644 --- a/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp +++ b/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp @@ -179,13 +179,20 @@ EncodeInstruction(const MCInst &MI, raw_ostream &OS, (Opcode != Mips::SLL_MM) && !Binary) llvm_unreachable("unimplemented opcode in EncodeInstruction()"); + int NewOpcode = -1; if (isMicroMips(STI)) { - int NewOpcode = isMips32r6(STI) ? - Mips::MipsR62MicroMipsR6(Opcode, Mips::Arch_micromipsr6) : - Mips::Std2MicroMips(Opcode, Mips::Arch_micromips); + if (isMips32r6(STI)) { + NewOpcode = Mips::MipsR62MicroMipsR6(Opcode, Mips::Arch_micromipsr6); + if (NewOpcode == -1) + NewOpcode = Mips::Std2MicroMipsR6(Opcode, Mips::Arch_micromipsr6); + } + else + NewOpcode = Mips::Std2MicroMips(Opcode, Mips::Arch_micromips); + if (NewOpcode != -1) { if (Fixups.size() > N) Fixups.pop_back(); + Opcode = NewOpcode; TmpInst.setOpcode (NewOpcode); Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI); diff --git a/lib/Target/Mips/MipsInstrFormats.td b/lib/Target/Mips/MipsInstrFormats.td index 8cc16037351..02ecf32d3e4 100644 --- a/lib/Target/Mips/MipsInstrFormats.td +++ b/lib/Target/Mips/MipsInstrFormats.td @@ -50,6 +50,20 @@ def Std2MicroMips : InstrMapping { let ValueCols = [["se"], ["micromips"]]; } +class StdMMR6Rel; + +def Std2MicroMipsR6 : InstrMapping { + let FilterClass = "StdMMR6Rel"; + // Instructions with the same BaseOpcode and isNVStore values form a row. + let RowFields = ["BaseOpcode"]; + // Instructions with the same predicate sense form a column. + let ColFields = ["Arch"]; + // The key column is the unpredicated instructions. + let KeyCol = ["se"]; + // Value columns are PredSense=true and PredSense=false + let ValueCols = [["se"], ["micromipsr6"]]; +} + class StdArch { string Arch = "se"; } -- 2.34.1