From d4d4f4f488d46a9743a0c494b42b22a1b15e0e7d Mon Sep 17 00:00:00 2001 From: Jason W Kim Date: Thu, 30 Sep 2010 02:17:26 +0000 Subject: [PATCH] I added a new file ARMAsmBackend which stubs out in similar ways to the eqv X86 class. For now, I split the ELFARMAsmBackend from the DarwinARMAsmBackend (also mimicking X86) Tested against -r115126 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115129 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARM.h | 3 + lib/Target/ARM/ARMAsmBackend.cpp | 143 ++++++++++++++++++++++++++++ lib/Target/ARM/ARMTargetMachine.cpp | 6 ++ lib/Target/ARM/CMakeLists.txt | 1 + 4 files changed, 153 insertions(+) create mode 100644 lib/Target/ARM/ARMAsmBackend.cpp diff --git a/lib/Target/ARM/ARM.h b/lib/Target/ARM/ARM.h index 73fe004087b..8c98bc984ab 100644 --- a/lib/Target/ARM/ARM.h +++ b/lib/Target/ARM/ARM.h @@ -27,11 +27,14 @@ class FunctionPass; class JITCodeEmitter; class formatted_raw_ostream; class MCCodeEmitter; +class TargetAsmBackend; MCCodeEmitter *createARMMCCodeEmitter(const Target &, TargetMachine &TM, MCContext &Ctx); +TargetAsmBackend *createARMAsmBackend(const Target &, const std::string &); + FunctionPass *createARMISelDag(ARMBaseTargetMachine &TM, CodeGenOpt::Level OptLevel); diff --git a/lib/Target/ARM/ARMAsmBackend.cpp b/lib/Target/ARM/ARMAsmBackend.cpp new file mode 100644 index 00000000000..be3f929e963 --- /dev/null +++ b/lib/Target/ARM/ARMAsmBackend.cpp @@ -0,0 +1,143 @@ +//===-- ARMAsmBackend.cpp - ARM Assembler Backend -------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/Target/TargetAsmBackend.h" +#include "ARM.h" +//FIXME: add #include "ARMFixupKinds.h" +#include "llvm/ADT/Twine.h" +#include "llvm/MC/ELFObjectWriter.h" +#include "llvm/MC/MCAssembler.h" +#include "llvm/MC/MCExpr.h" +#include "llvm/MC/MCObjectWriter.h" +#include "llvm/MC/MCSectionCOFF.h" +#include "llvm/MC/MCSectionELF.h" +#include "llvm/MC/MCSectionMachO.h" +#include "llvm/MC/MachObjectWriter.h" +#include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/raw_ostream.h" +#include "llvm/Target/TargetRegistry.h" +#include "llvm/Target/TargetAsmBackend.h" +using namespace llvm; + +namespace { +class ARMAsmBackend : public TargetAsmBackend { +public: + ARMAsmBackend(const Target &T) + : TargetAsmBackend(T) { + } + + bool MayNeedRelaxation(const MCInst &Inst) const; + + void RelaxInstruction(const MCInst &Inst, MCInst &Res) const; + + bool WriteNopData(uint64_t Count, MCObjectWriter *OW) const; +}; + +bool ARMAsmBackend::MayNeedRelaxation(const MCInst &Inst) const { + // FIXME: Thumb targets, different move constant targets.. + return false; +} + +void ARMAsmBackend::RelaxInstruction(const MCInst &Inst, MCInst &Res) const { + assert(0 && "ARMAsmBackend::RelaxInstruction() unimplemented"); + return; +} + +bool ARMAsmBackend::WriteNopData(uint64_t Count, MCObjectWriter *OW) const { + assert(0 && "ARMAsmBackend::WriteNopData() unimplemented"); + if ((Count % 4) != 0) { + // Fixme: % 2 for Thumb? + return false; + } + return false; +}; +} // end anonymous namespace + +namespace { +// FIXME: This should be in a separate file. +// ELF is an ELF of course... +class ELFARMAsmBackend : public ARMAsmBackend { +public: + Triple::OSType OSType; + ELFARMAsmBackend(const Target &T, Triple::OSType _OSType) + : ARMAsmBackend(T), OSType(_OSType) { + HasAbsolutizedSet = true; + HasScatteredSymbols = true; + } + + void ApplyFixup(const MCFixup &Fixup, MCDataFragment &DF, + uint64_t Value) const; + + bool isVirtualSection(const MCSection &Section) const { + const MCSectionELF &SE = static_cast(Section); + return SE.getType() == MCSectionELF::SHT_NOBITS; + } + + MCObjectWriter *createObjectWriter(raw_ostream &OS) const { + return new ELFObjectWriter(OS, /*Is64Bit=*/false, + OSType, + /*IsLittleEndian=*/true, + /*HasRelocationAddend=*/false); + } +}; + +// Fixme: can we raise this to share code bet. Darwin and ELF? +void ELFARMAsmBackend::ApplyFixup(const MCFixup &Fixup, MCDataFragment &DF, + uint64_t Value) const { + assert(0 && "ELFARMAsmBackend::ApplyFixup() unimplemented"); +} + +// FIXME: This should be in a separate file. +class DarwinARMAsmBackend : public ARMAsmBackend { +public: + DarwinARMAsmBackend(const Target &T) + : ARMAsmBackend(T) { + HasAbsolutizedSet = true; + HasScatteredSymbols = true; + assert(0 && "DarwinARMAsmBackend::DarwinARMAsmBackend() unimplemented"); + } + + void ApplyFixup(const MCFixup &Fixup, MCDataFragment &DF, + uint64_t Value) const; + + bool isVirtualSection(const MCSection &Section) const { + const MCSectionMachO &SMO = static_cast(Section); + return (SMO.getType() == MCSectionMachO::S_ZEROFILL || + SMO.getType() == MCSectionMachO::S_GB_ZEROFILL || + SMO.getType() == MCSectionMachO::S_THREAD_LOCAL_ZEROFILL); + } + + MCObjectWriter *createObjectWriter(raw_ostream &OS) const { + return new MachObjectWriter(OS, /*Is64Bit=*/false); + } + + virtual bool doesSectionRequireSymbols(const MCSection &Section) const { + return false; + } +}; + +void DarwinARMAsmBackend::ApplyFixup(const MCFixup &Fixup, MCDataFragment &DF, + uint64_t Value) const { + assert(0 && "DarwinARMAsmBackend::ApplyFixup() unimplemented"); +} +} // end anonymous namespace + +TargetAsmBackend *llvm::createARMAsmBackend(const Target &T, + const std::string &TT) { + switch (Triple(TT).getOS()) { + case Triple::Darwin: + return new DarwinARMAsmBackend(T); + case Triple::MinGW32: + case Triple::Cygwin: + case Triple::Win32: + assert(0 && "Windows not supported on ARM"); + default: + return new ELFARMAsmBackend(T, Triple(TT).getOS()); + } +} diff --git a/lib/Target/ARM/ARMTargetMachine.cpp b/lib/Target/ARM/ARMTargetMachine.cpp index d8dfb71b192..8d9bc5315c6 100644 --- a/lib/Target/ARM/ARMTargetMachine.cpp +++ b/lib/Target/ARM/ARMTargetMachine.cpp @@ -67,6 +67,12 @@ extern "C" void LLVMInitializeARMTarget() { TargetRegistry::RegisterCodeEmitter(TheThumbTarget, createARMMCCodeEmitter); + // Register the asm backend. + TargetRegistry::RegisterAsmBackend(TheARMTarget, + createARMAsmBackend); + TargetRegistry::RegisterAsmBackend(TheThumbTarget, + createARMAsmBackend); + // Register the object streamer. TargetRegistry::RegisterObjectStreamer(TheARMTarget, createMCStreamer); diff --git a/lib/Target/ARM/CMakeLists.txt b/lib/Target/ARM/CMakeLists.txt index 49120588e30..3cf58e162c8 100644 --- a/lib/Target/ARM/CMakeLists.txt +++ b/lib/Target/ARM/CMakeLists.txt @@ -16,6 +16,7 @@ tablegen(ARMGenEDInfo.inc -gen-enhanced-disassembly-info) tablegen(ARMGenDecoderTables.inc -gen-arm-decoder) add_llvm_target(ARMCodeGen + ARMAsmBackend.cpp ARMAsmPrinter.cpp ARMBaseInstrInfo.cpp ARMBaseRegisterInfo.cpp -- 2.34.1