From d4d9489f5e20ecb06d6c4a5f44ea16b1e9a0053c Mon Sep 17 00:00:00 2001
From: David Wu <david.wu@rock-chips.com>
Date: Thu, 17 Mar 2016 03:41:00 +0800
Subject: [PATCH] ARM64: dts: rk3399: add pinctrl for uart

Change-Id: I8c48826d789bb48f234aa82014754dd519888d07
Signed-off-by: David Wu <david.wu@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 9f93d3f0458e..73229c2ee708 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -68,6 +68,7 @@
 		serial1 = &uart1;
 		serial2 = &uart2;
 		serial3 = &uart3;
+		serial4 = &uart4;
 	};
 
 	psci {
@@ -479,6 +480,8 @@
 		interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
 		reg-shift = <2>;
 		reg-io-width = <4>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
 		status = "disabled";
 	};
 
@@ -490,6 +493,8 @@
 		interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
 		reg-shift = <2>;
 		reg-io-width = <4>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&uart1_xfer>;
 		status = "disabled";
 	};
 
@@ -501,6 +506,8 @@
 		interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
 		reg-shift = <2>;
 		reg-io-width = <4>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&uart2c_xfer>;
 		status = "disabled";
 	};
 
@@ -512,6 +519,8 @@
 		interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
 		reg-shift = <2>;
 		reg-io-width = <4>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&uart3_xfer &uart3_cts &uart3_rts>;
 		status = "disabled";
 	};
 
@@ -689,6 +698,8 @@
 		interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
 		reg-shift = <2>;
 		reg-io-width = <4>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart4_xfer>;
 		status = "disabled";
 	};
 
-- 
2.34.1