From d50a5ad0e90e33c95a2674f9cd3fc1120e26ca25 Mon Sep 17 00:00:00 2001 From: wdc Date: Thu, 26 Jun 2014 11:11:38 +0800 Subject: [PATCH] 3036: fix cpu timer ints and nandc dts node --- arch/arm/boot/dts/rk3036.dtsi | 7 ++++--- arch/arm/mach-rockchip/rk3036.c | 20 +++++++++++++++++++- 2 files changed, 23 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi index 2d5a8e2fc606..5b02518c4d6d 100644 --- a/arch/arm/boot/dts/rk3036.dtsi +++ b/arch/arm/boot/dts/rk3036.dtsi @@ -57,7 +57,7 @@ timer { compatible = "arm,armv7-timer"; interrupts = , - ; + ; clock-frequency = <24000000>; }; @@ -90,10 +90,11 @@ }; }; - nandc: nandc@0xff400000 { + nandc: nandc@10500000 { compatible = "rockchip,rk-nandc"; - reg = <0xff400000 0x4000>; + reg = <0x10500000 0x4000>; interrupts = ; + nandc_id = <0>; clocks = <&clk_nandc>, <&clk_gates5 9>; clock-names = "clk_nandc", "hclk_nandc"; }; diff --git a/arch/arm/mach-rockchip/rk3036.c b/arch/arm/mach-rockchip/rk3036.c index 26a924833bd4..fc8b01faccaa 100644 --- a/arch/arm/mach-rockchip/rk3036.c +++ b/arch/arm/mach-rockchip/rk3036.c @@ -65,7 +65,7 @@ static void __init rk3036_dt_map_io(void) rockchip_soc_id = ROCKCHIP_SOC_RK3036; iotable_init(rk3036_io_desc, ARRAY_SIZE(rk3036_io_desc)); - + debug_ll_io_init(); /* enable timer5 for core */ writel_relaxed(0, RK3036_TIMER5_VIRT + 0x10); dsb(); @@ -76,8 +76,26 @@ static void __init rk3036_dt_map_io(void) dsb(); } +static int rk3036_sys_set_power_domain(enum pmu_power_domain pd, bool on) +{ + return 0; +} + +static bool rk3036_pmu_power_domain_is_on(enum pmu_power_domain pd) +{ + return 0; +} + +static int rk3036_pmu_set_idle_request(enum pmu_idle_req req, bool idle) +{ + return 0; +} + static void __init rk3036_dt_init_timer(void) { + rockchip_pmu_ops.set_power_domain = rk3036_sys_set_power_domain; + rockchip_pmu_ops.power_domain_is_on = rk3036_pmu_power_domain_is_on; + rockchip_pmu_ops.set_idle_request = rk3036_pmu_set_idle_request; clocksource_of_init(); } -- 2.34.1