From d57194fe94c6b38d0e9a178c662dff7ca2722b1b Mon Sep 17 00:00:00 2001 From: Daniel Sanders Date: Mon, 16 Mar 2015 14:21:22 +0000 Subject: [PATCH] Revert r232374: [hexagon] Distinguish the 'o', 'v', and 'm' inline assembly memory constraints. 2007-12-17-InvokeAsm.ll fails on the buildbot but not on my own system. Will investigate. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232376 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/IR/InlineAsm.h | 4 ++-- lib/Target/Hexagon/HexagonISelDAGToDAG.cpp | 6 +++--- lib/Target/Hexagon/HexagonISelLowering.h | 7 ++----- 3 files changed, 7 insertions(+), 10 deletions(-) diff --git a/include/llvm/IR/InlineAsm.h b/include/llvm/IR/InlineAsm.h index ea3708d4635..e94323a24d7 100644 --- a/include/llvm/IR/InlineAsm.h +++ b/include/llvm/IR/InlineAsm.h @@ -240,8 +240,8 @@ public: // constraint codes for all targets. Constraint_Unknown = 0, Constraint_m, - Constraint_o, - Constraint_v, + Constraint_o, // Unused at the moment since Constraint_m is always used. + Constraint_v, // Unused at the moment since Constraint_m is always used. Constraints_Max = Constraint_v, Constraints_ShiftAmount = 16, diff --git a/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp b/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp index d746df98cdc..795faf97af4 100644 --- a/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp +++ b/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp @@ -1108,11 +1108,11 @@ SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, SDValue Inp = Op, Res; switch (ConstraintID) { + case InlineAsm::Constraint_o: // Offsetable. + case InlineAsm::Constraint_v: // Not offsetable. default: return true; - case InlineAsm::Constraint_o: // Offsetable. - case InlineAsm::Constraint_v: // Not offsetable. - case InlineAsm::Constraint_m: // Memory. + case InlineAsm::Constraint_m: // Memory. if (SelectAddrFI(Inp, Res)) OutOps.push_back(Res); else diff --git a/lib/Target/Hexagon/HexagonISelLowering.h b/lib/Target/Hexagon/HexagonISelLowering.h index 99214c8d445..7b772f07eb0 100644 --- a/lib/Target/Hexagon/HexagonISelLowering.h +++ b/lib/Target/Hexagon/HexagonISelLowering.h @@ -185,11 +185,8 @@ bool isPositiveHalfWord(SDNode *N); unsigned getInlineAsmMemConstraint( const std::string &ConstraintCode) const override { - if (ConstraintCode == "o") - return InlineAsm::Constraint_o; - else if (ConstraintCode == "v") - return InlineAsm::Constraint_v; - return TargetLowering::getInlineAsmMemConstraint(ConstraintCode); + // FIXME: Map different constraints differently. + return InlineAsm::Constraint_m; } // Intrinsics -- 2.34.1