From db8d74251c07322ca0833e41ab1502bd49864d86 Mon Sep 17 00:00:00 2001 From: Zhaoyifeng Date: Mon, 21 Jul 2014 19:30:07 +0800 Subject: [PATCH] add nand config in dts --- arch/arm/boot/dts/rk3126-sdk.dts | 7 +++++++ arch/arm/boot/dts/rk312x.dtsi | 16 ++++++++++++++++ 2 files changed, 23 insertions(+) mode change 100644 => 100755 arch/arm/boot/dts/rk3126-sdk.dts diff --git a/arch/arm/boot/dts/rk3126-sdk.dts b/arch/arm/boot/dts/rk3126-sdk.dts old mode 100644 new mode 100755 index f4f93a41557b..55349fe18039 --- a/arch/arm/boot/dts/rk3126-sdk.dts +++ b/arch/arm/boot/dts/rk3126-sdk.dts @@ -7,4 +7,11 @@ fiq-debugger { status = "okay"; }; + &nandc { + status = "okay"; // used nand set "okay" ,used emmc set "disabled" + }; + + &nandc0reg { + status = "disabled"; // used nand set "disabled" ,used emmc set "okay" + }; }; diff --git a/arch/arm/boot/dts/rk312x.dtsi b/arch/arm/boot/dts/rk312x.dtsi index 49779776fbaf..62e75e6f54c6 100755 --- a/arch/arm/boot/dts/rk312x.dtsi +++ b/arch/arm/boot/dts/rk312x.dtsi @@ -106,6 +106,22 @@ }; }; + + nandc: nandc@10500000 { + compatible = "rockchip,rk-nandc"; + reg = <0x10500000 0x4000>; + interrupts = ; + //pinctrl-names = "default"; + //pinctrl-0 = <&nandc_ale &nandc_cle &nandc_wrn &nandc_rdn &nandc_rdy &nandc_cs0 &nandc_data>; + nandc_id = <0>; + clocks = <&clk_nandc>, <&clk_gates5 9>, <&clk_gates10 15>; + clock-names = "clk_nandc", "g_clk_nandc", "hclk_nandc"; + }; + + nandc0reg: nandc0@10500000 { + compatible = "rockchip,rk-nandc"; + reg = <0x10500000 0x4000>; + }; uart0: serial@20060000 { compatible = "rockchip,serial"; reg = <0x20060000 0x100>; -- 2.34.1