From dbab1c23c7895dba2e97051baec01369b2cfc0b4 Mon Sep 17 00:00:00 2001
From: Matthias Braun <matze@braunis.de>
Date: Mon, 19 Oct 2015 17:44:22 +0000
Subject: [PATCH] Revert "RegisterPressure: allocatable physreg uses are always
 kills"

This reverts commit r250596.

Reverted for now as the commit triggers assert in the AMDGPU target
pending investigation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250713 91177308-0d34-0410-b5e6-96231b3b80d8
---
 include/llvm/CodeGen/RegisterPressure.h |  2 -
 lib/CodeGen/RegisterPressure.cpp        | 52 ++++++++++++-------------
 2 files changed, 25 insertions(+), 29 deletions(-)

diff --git a/include/llvm/CodeGen/RegisterPressure.h b/include/llvm/CodeGen/RegisterPressure.h
index 67ae00762b2..166bd868689 100644
--- a/include/llvm/CodeGen/RegisterPressure.h
+++ b/include/llvm/CodeGen/RegisterPressure.h
@@ -444,8 +444,6 @@ public:
 protected:
   const LiveRange *getLiveRange(unsigned Reg) const;
 
-  bool isLastUse(unsigned VRegOrUnit, SlotIndex Pos) const;
-
   void increaseRegPressure(ArrayRef<unsigned> Regs);
   void decreaseRegPressure(ArrayRef<unsigned> Regs);
 
diff --git a/lib/CodeGen/RegisterPressure.cpp b/lib/CodeGen/RegisterPressure.cpp
index 2ef23c7541d..ba0a9158b46 100644
--- a/lib/CodeGen/RegisterPressure.cpp
+++ b/lib/CodeGen/RegisterPressure.cpp
@@ -568,17 +568,6 @@ bool RegPressureTracker::recede(SmallVectorImpl<unsigned> *LiveUses,
   return true;
 }
 
-bool RegPressureTracker::isLastUse(unsigned VRegOrUnit, SlotIndex Pos) const {
-  // Allocatable physregs are always single-use before register rewriting.
-  if (!TargetRegisterInfo::isVirtualRegister(VRegOrUnit))
-    return true;
-  // Without liveness information we conservatively assume "no last use".
-  if (!RequireIntervals)
-    return false;
-  const LiveRange *LR = getLiveRange(VRegOrUnit);
-  return LR && LR->Query(Pos).isKill();
-}
-
 /// Advance across the current instruction.
 bool RegPressureTracker::advance() {
   assert(!TrackUntiedDefs && "unsupported mode");
@@ -613,15 +602,21 @@ bool RegPressureTracker::advance() {
     if (!isLive)
       discoverLiveIn(Reg);
     // Kill liveness at last uses.
-    if (isLastUse(Reg, SlotIdx)) {
-      if (isLive) {
-        LiveRegs.erase(Reg);
-        decreaseRegPressure(Reg);
-      }
-    } else if(!isLive) {
-      // We discovered a live which was not last used here, adjust pressure.
-      increaseRegPressure(Reg);
+    bool lastUse = false;
+    if (RequireIntervals) {
+      const LiveRange *LR = getLiveRange(Reg);
+      lastUse = LR && LR->Query(SlotIdx).isKill();
+    }
+    else {
+      // Allocatable physregs are always single-use before register rewriting.
+      lastUse = !TargetRegisterInfo::isVirtualRegister(Reg);
+    }
+    if (lastUse && isLive) {
+      LiveRegs.erase(Reg);
+      decreaseRegPressure(Reg);
     }
+    else if (!lastUse && !isLive)
+      increaseRegPressure(Reg);
   }
 
   // Generate liveness for defs.
@@ -936,18 +931,21 @@ void RegPressureTracker::bumpDownwardPressure(const MachineInstr *MI) {
 
   for (unsigned i = 0, e = RegOpers.Uses.size(); i < e; ++i) {
     unsigned Reg = RegOpers.Uses[i];
-    bool IsLastUse = isLastUse(Reg, SlotIdx);
-    // We had a last use at MIs position. To know the situation for the current
-    // position we have to check if there exist other uses in between.
-    if (IsLastUse && TargetRegisterInfo::isVirtualRegister(Reg)) {
-      SlotIndex CurrIdx = getCurrSlot();
+    if (RequireIntervals) {
       // FIXME: allow the caller to pass in the list of vreg uses that remain
       // to be bottom-scheduled to avoid searching uses at each query.
-      if (findUseBetween(Reg, CurrIdx, SlotIdx, *MRI, LIS))
-        IsLastUse = false;
+      SlotIndex CurrIdx = getCurrSlot();
+      const LiveRange *LR = getLiveRange(Reg);
+      if (LR) {
+        LiveQueryResult LRQ = LR->Query(SlotIdx);
+        if (LRQ.isKill() && !findUseBetween(Reg, CurrIdx, SlotIdx, *MRI, LIS))
+          decreaseRegPressure(Reg);
+      }
     }
-    if (IsLastUse)
+    else if (!TargetRegisterInfo::isVirtualRegister(Reg)) {
+      // Allocatable physregs are always single-use before register rewriting.
       decreaseRegPressure(Reg);
+    }
   }
 
   // Generate liveness for defs.
-- 
2.34.1